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Searched refs:TZRAM_BASE (Results 1 – 16 of 16) sorted by relevance

/trusted-firmware-a-latest/plat/rockchip/rk3288/include/shared/
Dbl32_param.h14 #define TZRAM_BASE (0x0) macro
23 #define BL32_BASE (TZRAM_BASE + 0x40000)
24 #define BL32_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/trusted-firmware-a-latest/plat/rockchip/rk3399/include/shared/
Dbl31_param.h14 #define TZRAM_BASE (0x0) macro
23 #define BL31_BASE (TZRAM_BASE + 0x40000)
24 #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/trusted-firmware-a-latest/plat/mediatek/mt8173/include/
Dplatform_def.h74 #define TZRAM_BASE (0x100000) macro
82 #define TZRAM2_BASE (TZRAM_BASE + TZRAM_SIZE)
93 #define BL31_BASE (TZRAM_BASE + 0x1000)
94 #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/trusted-firmware-a-latest/plat/rockchip/rk3328/include/
Dplatform_def.h70 #define TZRAM_BASE (0x0) macro
79 #define BL31_BASE (TZRAM_BASE + 0x40000)
80 #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/trusted-firmware-a-latest/plat/rockchip/px30/include/
Dplatform_def.h73 #define TZRAM_BASE (0x0) macro
82 #define BL31_BASE (TZRAM_BASE + 0x40000)
83 #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/trusted-firmware-a-latest/plat/rockchip/rk3368/include/
Dplatform_def.h71 #define TZRAM_BASE (0x0) macro
80 #define BL31_BASE (TZRAM_BASE + 0x40000)
81 #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/trusted-firmware-a-latest/plat/mediatek/mt8192/include/
Dplatform_def.h118 #define TZRAM_BASE 0x54600000 macro
129 #define BL31_BASE (TZRAM_BASE + 0x1000)
130 #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/trusted-firmware-a-latest/plat/mediatek/mt8186/include/
Dplatform_def.h128 #define TZRAM_BASE (0x54600000) macro
139 #define BL31_BASE (TZRAM_BASE + 0x1000)
140 #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/trusted-firmware-a-latest/plat/mediatek/mt8195/include/
Dplatform_def.h135 #define TZRAM_BASE 0x54600000 macro
146 #define BL31_BASE (TZRAM_BASE + 0x1000)
147 #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/trusted-firmware-a-latest/plat/mediatek/mt8188/include/
Dplatform_def.h203 #define TZRAM_BASE (0x54600000) macro
214 #define BL31_BASE (TZRAM_BASE + 0x1000)
215 #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/trusted-firmware-a-latest/plat/mediatek/mt8183/include/
Dplatform_def.h288 #define TZRAM_BASE 0x54600000 macro
299 #define BL31_BASE (TZRAM_BASE + 0x1000)
300 #define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
/trusted-firmware-a-latest/plat/mediatek/mt8173/aarch64/
Dplatform_common.c26 MAP_REGION_FLAT(TZRAM_BASE, TZRAM_SIZE,
/trusted-firmware-a-latest/plat/mediatek/mt8183/aarch64/
Dplatform_common.c23 MAP_REGION_FLAT(TZRAM_BASE, TZRAM_SIZE,
/trusted-firmware-a-latest/plat/rockchip/px30/drivers/secure/
Dsecure.c81 secure_ddr_region(0, TZRAM_BASE, TZRAM_SIZE); in sgrf_init()
/trusted-firmware-a-latest/plat/rockchip/rk3288/drivers/secure/
Dsecure.c163 sgrf_ddr_rgn_config(0, TZRAM_BASE, TZRAM_SIZE); in secure_sgrf_ddr_rgn_init()
/trusted-firmware-a-latest/plat/rockchip/rk3399/drivers/secure/
Dsecure.c165 sgrf_ddr_rgn_config(0, TZRAM_BASE, TZRAM_SIZE); in secure_sgrf_ddr_rgn_init()