Searched refs:SOCFPGA_RSTMGR_CPUBASELOW_3 (Results 1 – 2 of 2) sorted by relevance
58 #define SOCFPGA_RSTMGR_CPUBASELOW_3 0x0B0 macro
881 entrypoint = mmio_read_32(SOCFPGA_RSTMGR_CPUBASELOW_3); in socfpga_cpu_reset_base()
