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Searched refs:SOCFPGA_RSTMGR_CPUBASELOW_2 (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-a-latest/plat/intel/soc/common/include/
Dsocfpga_reset_manager.h56 #define SOCFPGA_RSTMGR_CPUBASELOW_2 0x0A8 macro
/trusted-firmware-a-latest/plat/intel/soc/common/soc/
Dsocfpga_reset_manager.c876 entrypoint = mmio_read_32(SOCFPGA_RSTMGR_CPUBASELOW_2); in socfpga_cpu_reset_base()