Searched refs:SOCFPGA_RSTMGR_CPUBASELOW_1 (Results 1 – 2 of 2) sorted by relevance
54 #define SOCFPGA_RSTMGR_CPUBASELOW_1 0x0A0 macro
871 entrypoint = mmio_read_32(SOCFPGA_RSTMGR_CPUBASELOW_1); in socfpga_cpu_reset_base()
