Searched refs:RTX_CLK_CTL1 (Results 1 – 2 of 2) sorted by relevance
201 mmio_write_32(IMX_HDMI_CTL_BASE + RTX_CLK_CTL1, 0x7ffff87e); in imx_gpc_pm_domain_enable()220 mmio_write_32(IMX_HDMI_CTL_BASE + RTX_CLK_CTL1, 0x0); in imx_gpc_pm_domain_enable()225 mmio_write_32(IMX_HDMI_CTL_BASE + RTX_CLK_CTL1, 0x7ffff87e); in imx_gpc_pm_domain_enable()
132 #define RTX_CLK_CTL1 U(0x50) macro
