Searched refs:RCC_APB5DIVR (Results 1 – 4 of 4) sorted by relevance
911 reg = mmio_read_32(rcc_base + RCC_APB5DIVR); in get_clock_rate()1979 ret = stm32mp1_set_clkdiv(clkdiv[CLKDIV_APB5], rcc_base + RCC_APB5DIVR); in stm32mp1_clk_init()
862 DIV_CFG(DIV_APB5, RCC_APB5DIVR, 0, 3, 0, apb_div_table, 31),
71 #define RCC_APB5DIVR U(0X580) macro
23 #define RCC_APB5DIVR U(0x40) macro