Searched refs:MVEBU_CP_MSS_DPSHSR_REG (Results 1 – 1 of 1) sorted by relevance
81 #define MVEBU_CP_MSS_DPSHSR_REG (0x280040) macro217 reg = mmio_read_32(base + MVEBU_CP_MSS_DPSHSR_REG); in cp110_pcie_clk_cfg()219 mmio_write_32(base + MVEBU_CP_MSS_DPSHSR_REG, reg); in cp110_pcie_clk_cfg()
