Searched refs:MP_CPUSYS_TOP_MP0_DCM_CFG7 (Results 1 – 6 of 6) sorted by relevance
/trusted-firmware-a-latest/plat/mediatek/drivers/dcm/mt8188/ |
D | mtk_dcm_utils.c | 158 return dcm_check_state(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_core_stall_dcm_is_on() 167 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_core_stall_dcm() 172 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_core_stall_dcm() 262 return dcm_check_state(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_fcm_stall_dcm_is_on() 271 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_fcm_stall_dcm() 276 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_fcm_stall_dcm()
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D | mtk_dcm_utils.h | 30 #define MP_CPUSYS_TOP_MP0_DCM_CFG7 (MP_CPUSYS_TOP_BASE + 0x489c) macro
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/trusted-firmware-a-latest/plat/mediatek/mt8186/drivers/dcm/ |
D | mtk_dcm_utils.c | 166 ret &= ((mmio_read_32(MP_CPUSYS_TOP_MP0_DCM_CFG7) & in dcm_mp_cpusys_top_core_stall_dcm_is_on() 177 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_core_stall_dcm() 182 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_core_stall_dcm() 328 ret &= ((mmio_read_32(MP_CPUSYS_TOP_MP0_DCM_CFG7) & in dcm_mp_cpusys_top_fcm_stall_dcm_is_on() 339 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_fcm_stall_dcm() 344 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_fcm_stall_dcm()
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D | mtk_dcm_utils.h | 28 #define MP_CPUSYS_TOP_MP0_DCM_CFG7 (MP_CPUSYS_TOP_BASE + 0x489c) macro
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/trusted-firmware-a-latest/plat/mediatek/mt8195/drivers/dcm/ |
D | mtk_dcm_utils.c | 184 ret &= ((mmio_read_32(MP_CPUSYS_TOP_MP0_DCM_CFG7) & in dcm_mp_cpusys_top_core_stall_dcm_is_on() 195 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_core_stall_dcm() 200 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_core_stall_dcm() 310 ret &= ((mmio_read_32(MP_CPUSYS_TOP_MP0_DCM_CFG7) & in dcm_mp_cpusys_top_fcm_stall_dcm_is_on() 321 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_fcm_stall_dcm() 326 mmio_clrsetbits_32(MP_CPUSYS_TOP_MP0_DCM_CFG7, in dcm_mp_cpusys_top_fcm_stall_dcm()
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D | mtk_dcm_utils.h | 30 #define MP_CPUSYS_TOP_MP0_DCM_CFG7 (MP_CPUSYS_TOP_BASE + 0x489c) macro
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