Searched refs:MP_CPUSYS_TOP_CPU_PLLDIV_CFG1 (Results 1 – 6 of 6) sorted by relevance
21 #define MP_CPUSYS_TOP_CPU_PLLDIV_CFG1 (MP_CPUSYS_TOP_BASE + 0x22a4) macro
280 ret &= ((mmio_read_32(MP_CPUSYS_TOP_CPU_PLLDIV_CFG1) & in dcm_mp_cpusys_top_cpu_pll_div_1_dcm_is_on()291 mmio_clrsetbits_32(MP_CPUSYS_TOP_CPU_PLLDIV_CFG1, in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()296 mmio_clrsetbits_32(MP_CPUSYS_TOP_CPU_PLLDIV_CFG1, in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()
22 #define MP_CPUSYS_TOP_CPU_PLLDIV_CFG1 (MP_CPUSYS_TOP_BASE + 0x22a4) macro
236 return dcm_check_state(MP_CPUSYS_TOP_CPU_PLLDIV_CFG1, in dcm_mp_cpusys_top_cpu_pll_div_1_dcm_is_on()245 mmio_clrsetbits_32(MP_CPUSYS_TOP_CPU_PLLDIV_CFG1, in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()250 mmio_clrsetbits_32(MP_CPUSYS_TOP_CPU_PLLDIV_CFG1, in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()
23 #define MP_CPUSYS_TOP_CPU_PLLDIV_CFG1 (MP_CPUSYS_TOP_BASE + 0x22a4) macro
298 ret &= ((mmio_read_32(MP_CPUSYS_TOP_CPU_PLLDIV_CFG1) & in dcm_mp_cpusys_top_cpu_pll_div_1_dcm_is_on()309 mmio_clrsetbits_32(MP_CPUSYS_TOP_CPU_PLLDIV_CFG1, in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()314 mmio_clrsetbits_32(MP_CPUSYS_TOP_CPU_PLLDIV_CFG1, in dcm_mp_cpusys_top_cpu_pll_div_1_dcm()