Searched refs:MMC_REG_BASE (Results 1 – 2 of 2) sorted by relevance
99 data = mmio_read_32(MMC_REG_BASE + SDHC_CDNS_SRS09); in cdns_busy()106 mmio_write_32((MMC_REG_BASE + SDHC_CDNS_SRS10), (7 << SDMMC_CDN_BVS) | (1 << SDMMC_CDN_BP)); in cdns_vol_reset()108 mmio_write_32((MMC_REG_BASE + SDHC_CDNS_SRS10), (7 << SDMMC_CDN_BVS) | (0 << SDMMC_CDN_BP)); in cdns_vol_reset()113 mmio_write_32((MMC_REG_BASE + SDHC_CDNS_SRS10), (7 << SDMMC_CDN_BVS) | (1 << SDMMC_CDN_BP)); in cdns_vol_reset()173 ret = cdns_sdmmc_write_phy_reg(MMC_REG_BASE + SDHC_CDNS_HRS04, in cdns_program_phy_reg()174 COMBO_PHY_REG + PHY_DQS_TIMING_REG, MMC_REG_BASE + in cdns_program_phy_reg()186 ret = cdns_sdmmc_write_phy_reg(MMC_REG_BASE + SDHC_CDNS_HRS04, in cdns_program_phy_reg()187 COMBO_PHY_REG + PHY_GATE_LPBK_CTRL_REG, MMC_REG_BASE + in cdns_program_phy_reg()196 ret = cdns_sdmmc_write_phy_reg(MMC_REG_BASE + SDHC_CDNS_HRS04, in cdns_program_phy_reg()197 COMBO_PHY_REG + PHY_DLL_MASTER_CTRL_REG, MMC_REG_BASE in cdns_program_phy_reg()[all …]
19 #define MMC_REG_BASE SOCFPGA_MMC_REG_BASE macro
