Searched refs:IMX_CCM_BASE (Results 1 – 8 of 8) sorted by relevance
12 #define IMX_CCM_IP_BASE (IMX_CCM_BASE + 0xa000)13 #define DRAM_SEL_CFG (IMX_CCM_BASE + 0x9800)
17 #define CCM_SRC_CTRL_OFFSET (IMX_CCM_BASE + 0x800)18 #define CCM_CCGR_OFFSET (IMX_CCM_BASE + 0x4000)19 #define CCM_TARGET_ROOT_OFFSET (IMX_CCM_BASE + 0x8000)
44 val = mmio_read_32(IMX_CCM_BASE + imx8m_uart_info[i].ccm_reg); in imx8m_uart_get_base()
185 hsiomix_clk[i].val = mmio_read_32(IMX_CCM_BASE + hsiomix_clk[i].offset); in imx_gpc_pm_domain_enable()186 mmio_setbits_32(IMX_CCM_BASE + hsiomix_clk[i].offset, in imx_gpc_pm_domain_enable()304 mmio_write_32(IMX_CCM_BASE + hsiomix_clk[i].offset, hsiomix_clk[i].val); in imx_gpc_pm_domain_enable()379 mmio_write_32(IMX_CCM_BASE + CCGR(i), 0x3); in imx_gpc_init()
72 #define IMX_CCM_BASE U(0x30380000) macro
98 #define IMX_CCM_BASE U(0x30380000) macro
81 #define IMX_CCM_BASE U(0x30380000) macro
100 #define IMX_CCM_BASE U(0x30380000) macro
