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Searched refs:GPIO3_BASE (Results 1 – 12 of 12) sorted by relevance

/trusted-firmware-a-latest/plat/imx/imx93/
Dimx93_bl31_setup.c109 mmio_write_32(GPIO3_BASE + 0x10, 0xffffffff); in bl31_plat_arch_setup()
110 mmio_write_32(GPIO3_BASE + 0x14, 0x3); in bl31_plat_arch_setup()
111 mmio_write_32(GPIO3_BASE + 0x18, 0xffffffff); in bl31_plat_arch_setup()
112 mmio_write_32(GPIO3_BASE + 0x1c, 0x3); in bl31_plat_arch_setup()
/trusted-firmware-a-latest/plat/hisilicon/hikey/include/
Dhi6220.h59 #define GPIO3_BASE 0xF8014000 macro
/trusted-firmware-a-latest/plat/rockchip/rk3328/
Drk3328_def.h48 #define GPIO3_BASE 0xff240000 macro
/trusted-firmware-a-latest/plat/rockchip/px30/
Dpx30_def.h88 #define GPIO3_BASE 0xff270000 macro
/trusted-firmware-a-latest/plat/imx/imx93/include/
Dplatform_def.h60 #define GPIO3_BASE U(0x43820000) macro
/trusted-firmware-a-latest/plat/rockchip/rk3399/include/shared/
Daddressmap_shared.h41 #define GPIO3_BASE (MMIO_BASE + 0x07788000) macro
/trusted-firmware-a-latest/plat/rockchip/rk3328/drivers/soc/
Dsoc.c38 MAP_REGION_FLAT(GPIO3_BASE, GPIO3_SIZE,
/trusted-firmware-a-latest/plat/hisilicon/hikey960/
Dhikey960_bl_common.c450 pl061_gpio_register(GPIO3_BASE, 3); in hikey960_gpio_init()
/trusted-firmware-a-latest/plat/hisilicon/hikey960/include/
Dhi3660.h246 #define GPIO3_BASE UL(0xE8A0E000) macro
/trusted-firmware-a-latest/plat/hisilicon/hikey/
Dhikey_bl_common.c56 pl061_gpio_register(GPIO3_BASE, 3); in hikey_gpio_init()
/trusted-firmware-a-latest/plat/rockchip/rk3399/drivers/pmu/
Dpmu.c938 gpio_direction[1] = mmio_read_32(GPIO3_BASE + 0x04); in suspend_apio()
958 mmio_clrbits_32(GPIO3_BASE + 0x04, 0x00ffffff); in suspend_apio()
1025 mmio_clrbits_32(GPIO3_BASE + 0x04, 0xff000000); in suspend_apio()
1049 mmio_write_32(GPIO3_BASE + 0x04, gpio_direction[1]); in resume_apio()
/trusted-firmware-a-latest/plat/rockchip/rk3399/drivers/gpio/
Drk3399_gpio.c102 .port_base = GPIO3_BASE,