Searched refs:GPIO0_BASE (Results 1 – 10 of 10) sorted by relevance
56 #define GPIO0_BASE 0xF8011000 macro
39 #define GPIO0_BASE 0xff210000 macro
34 #define GPIO0_BASE 0xff040000 macro
35 #define GPIO0_BASE (MMIO_BASE + 0x07720000) macro
32 MAP_REGION_FLAT(GPIO0_BASE, GPIO0_SIZE,
1025 val = mmio_read_32(GPIO0_BASE + SWPORTA_DDR); in rockchip_soc_system_off()1027 mmio_write_32(GPIO0_BASE + SWPORTA_DDR, val); in rockchip_soc_system_off()1030 val = mmio_read_32(GPIO0_BASE); in rockchip_soc_system_off()1032 mmio_write_32(GPIO0_BASE, val); in rockchip_soc_system_off()
447 pl061_gpio_register(GPIO0_BASE, 0); in hikey960_gpio_init()
243 #define GPIO0_BASE UL(0xE8A0B000) macro
53 pl061_gpio_register(GPIO0_BASE, 0); in hikey_gpio_init()
81 .port_base = GPIO0_BASE,
