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Searched refs:GENMASK_32 (Results 1 – 19 of 19) sorted by relevance

/trusted-firmware-a-latest/include/drivers/st/
Dstm32mp25_rcc.h719 #define RCC_SECCFGR3_SEC_MASK GENMASK_32(17, 0)
723 #define RCC_PRIVCFGR3_PRIV_MASK GENMASK_32(17, 0)
727 #define RCC_RCFGLOCKR3_RLOCK_MASK GENMASK_32(17, 0)
733 #define RCC_R0CIDCFGR_SCID_MASK GENMASK_32(6, 4)
735 #define RCC_R0CIDCFGR_SEMWLC_MASK GENMASK_32(23, 16)
740 #define RCC_R0SEMCR_SEMCID_MASK GENMASK_32(6, 4)
746 #define RCC_R1CIDCFGR_SCID_MASK GENMASK_32(6, 4)
748 #define RCC_R1CIDCFGR_SEMWLC_MASK GENMASK_32(23, 16)
753 #define RCC_R1SEMCR_SEMCID_MASK GENMASK_32(6, 4)
759 #define RCC_R2CIDCFGR_SCID_MASK GENMASK_32(6, 4)
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/trusted-firmware-a-latest/include/dt-bindings/clock/
Dstm32mp25-clksrc.h36 #define CLK_ID_MASK GENMASK_32(20, 12)
40 #define CLK_DIV_MASK GENMASK_32(10, 5)
44 #define CLK_SEL_MASK GENMASK_32(3, 0)
64 #define FLEX_ID_MASK GENMASK_32(18, 13)
65 #define FLEX_SEL_MASK GENMASK_32(12, 9)
66 #define FLEX_PDIV_MASK GENMASK_32(8, 6)
67 #define FLEX_FDIV_MASK GENMASK_32(5, 0)
Dstm32mp13-clksrc.h31 #define CLK_ID_MASK GENMASK_32(19, 11)
35 #define CLK_DIV_MASK GENMASK_32(9, 4)
37 #define CLK_SEL_MASK GENMASK_32(3, 0)
/trusted-firmware-a-latest/plat/st/common/
Dstm32mp_common.c29 #define BOARD_ID_BOARD_NB_MASK GENMASK_32(31, 16)
31 #define BOARD_ID_VARCPN_MASK GENMASK_32(15, 12)
33 #define BOARD_ID_REVISION_MASK GENMASK_32(11, 8)
35 #define BOARD_ID_VARFG_MASK GENMASK_32(7, 4)
37 #define BOARD_ID_BOM_MASK GENMASK_32(3, 0)
49 #define BOOT_AUTH_MASK GENMASK_32(23, 20)
51 #define BOOT_PART_MASK GENMASK_32(19, 16)
53 #define BOOT_ITF_MASK GENMASK_32(15, 12)
55 #define BOOT_INST_MASK GENMASK_32(11, 8)
/trusted-firmware-a-latest/drivers/st/fmc/
Dstm32_fmc2_nand.c54 #define FMC2_PCR_PWID_MASK GENMASK_32(5, 4)
60 #define FMC2_PCR_TCLR_MASK GENMASK_32(12, 9)
63 #define FMC2_PCR_TAR_MASK GENMASK_32(16, 13)
66 #define FMC2_PCR_ECCSS_MASK GENMASK_32(19, 17)
75 #define FMC2_PMEM_MEMSET(x) (((x) & GENMASK_32(7, 0)) << 0)
76 #define FMC2_PMEM_MEMWAIT(x) (((x) & GENMASK_32(7, 0)) << 8)
77 #define FMC2_PMEM_MEMHOLD(x) (((x) & GENMASK_32(7, 0)) << 16)
78 #define FMC2_PMEM_MEMHIZ(x) (((x) & GENMASK_32(7, 0)) << 24)
81 #define FMC2_PATT_ATTSET(x) (((x) & GENMASK_32(7, 0)) << 0)
82 #define FMC2_PATT_ATTWAIT(x) (((x) & GENMASK_32(7, 0)) << 8)
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/trusted-firmware-a-latest/plat/xilinx/common/include/
Dpm_node.h21 #define NODE_CLASS_MASK_BITS GENMASK_32(5, 0)
22 #define NODE_SUBCLASS_MASK_BITS GENMASK_32(5, 0)
23 #define NODE_TYPE_MASK_BITS GENMASK_32(5, 0)
24 #define NODE_INDEX_MASK_BITS GENMASK_32(13, 0)
/trusted-firmware-a-latest/plat/st/stm32mp1/
Dstm32mp1_def.h311 #define STM32MP1_ETZPC_TZMA_ALL_SECURE GENMASK_32(9, 0)
451 #define CFG0_OTP_MODE_MASK GENMASK_32(9, 0)
464 #define PART_NUMBER_OTP_PART_MASK GENMASK_32(11, 0)
467 #define PART_NUMBER_OTP_PART_MASK GENMASK_32(7, 0)
473 #define PACKAGE_OTP_PKG_MASK GENMASK_32(29, 27)
490 #define NAND_PAGE_SIZE_MASK GENMASK_32(30, 29)
497 #define NAND_BLOCK_SIZE_MASK GENMASK_32(28, 27)
504 #define NAND_BLOCK_NB_MASK GENMASK_32(26, 19)
513 #define NAND_ECC_BIT_NB_MASK GENMASK_32(17, 15)
/trusted-firmware-a-latest/drivers/scmi-msg/
Dclock.h117 #define SCMI_CLOCK_DESCRIBE_RATES_REMAINING_MASK GENMASK_32(31, 16)
123 #define SCMI_CLOCK_DESCRIBE_RATES_COUNT_MASK GENMASK_32(11, 0)
Dsmt.c55 #define SMT_MSG_ID_MASK GENMASK_32(7, 0)
58 #define SMT_MSG_TYPE_MASK GENMASK_32(9, 8)
61 #define SMT_MSG_PROT_ID_MASK GENMASK_32(17, 10)
Dreset_domain.h40 #define SCMI_RESET_DOMAIN_COUNT_MASK GENMASK_32(15, 0)
/trusted-firmware-a-latest/include/lib/
Dsmccc.h66 #define SOC_ID_JEP_106_BANK_IDX_MASK GENMASK_32(30, 24)
68 #define SOC_ID_JEP_106_ID_CODE_MASK GENMASK_32(23, 16)
70 #define SOC_ID_IMPL_DEF_MASK GENMASK_32(15, 0)
77 #define SOC_ID_REV_MASK GENMASK_32(30, 0)
Dutils_def.h37 #define GENMASK_32(h, l) \ macro
43 #define GENMASK_32(h, l) \ macro
53 #define GENMASK GENMASK_32
/trusted-firmware-a-latest/drivers/st/crypto/
Dstm32_pka.c59 #define _PKA_CR_MODE_MASK GENMASK_32(13, 8)
72 #define _PKA_IT_MASK (GENMASK_32(21, 19) | BIT(17))
80 #define _PKA_VERR_MAJREV_MASK GENMASK_32(7, 4)
82 #define _PKA_VERR_MINREV_MASK GENMASK_32(3, 0)
/trusted-firmware-a-latest/drivers/mtd/nand/
Draw_nand.c330 if (page.nb_ecc_bits != GENMASK_32(7, 0)) { in nand_read_param_page()
380 if ((bbm_marker[0] != GENMASK_32(7, 0)) || in nand_mtd_block_is_bad()
381 (bbm_marker[1] != GENMASK_32(7, 0))) { in nand_mtd_block_is_bad()
Dspi_nand.c246 if ((bbm_marker[0] != GENMASK_32(7, 0)) || in spi_nand_mtd_block_is_bad()
247 (bbm_marker[1] != GENMASK_32(7, 0))) { in spi_nand_mtd_block_is_bad()
/trusted-firmware-a-latest/drivers/st/spi/
Dstm32_qspi.c57 #define QSPI_CR_PRESCALER_MASK GENMASK_32(31, 24)
62 #define QSPI_DCR_CSHT_MASK GENMASK_32(10, 8)
64 #define QSPI_DCR_FSIZE_MASK GENMASK_32(20, 16)
/trusted-firmware-a-latest/plat/qti/msm8916/
Dmsm8916_config.c34 mmio_write_32(base + CNTNSAR, GENMASK_32(7, 0)); in msm8916_configure_timer()
/trusted-firmware-a-latest/plat/mediatek/mt8195/drivers/apusys/
Dapupwr_clkctl_def.h146 #define DDS_MASK GENMASK_32(21, 0)
/trusted-firmware-a-latest/docs/
Dchange-log.md1092 …- use GENMASK_32 to define PKA registers masks ([379d77b](https://review.trustedfirmware.org/plugi…