Searched refs:DRAM_PLL_CTRL (Results 1 – 6 of 6) sorted by relevance
| /trusted-firmware-a-latest/plat/imx/imx8m/ddr/ |
| D | clock.c | 87 mmio_setbits_32(DRAM_PLL_CTRL, (1 << 16)); in dram_pll_init()
88 mmio_clrbits_32(DRAM_PLL_CTRL, (1 << 9)); in dram_pll_init()
92 mmio_write_32(DRAM_PLL_CTRL + 0x4, (250 << 12) | (3 << 4) | 1); in dram_pll_init()
96 mmio_write_32(DRAM_PLL_CTRL + 0x4, (311 << 12) | (4 << 4) | 1); in dram_pll_init()
99 mmio_write_32(DRAM_PLL_CTRL + 0x4, (200 << 12) | (3 << 4) | 1); in dram_pll_init()
102 mmio_write_32(DRAM_PLL_CTRL + 0x4, (300 << 12) | (3 << 4) | 2); in dram_pll_init()
105 mmio_write_32(DRAM_PLL_CTRL + 0x4, (400 << 12) | (3 << 4) | 3); in dram_pll_init()
108 mmio_write_32(DRAM_PLL_CTRL + 0x4, (266 << 12) | (3 << 4) | 3); in dram_pll_init()
111 mmio_write_32(DRAM_PLL_CTRL + 0x4, (334 << 12) | (3 << 4) | 4); in dram_pll_init()
117 mmio_setbits_32(DRAM_PLL_CTRL, BIT(9)); in dram_pll_init()
[all …]
|
| D | dram_retention.c | 146 while (!(mmio_read_32(DRAM_PLL_CTRL) & BIT(31))) { in dram_exit_retention()
|
| /trusted-firmware-a-latest/plat/imx/imx8m/imx8mq/include/ |
| D | platform_def.h | 131 #define DRAM_PLL_CTRL HW_DRAM_PLL_CFG0 macro
|
| /trusted-firmware-a-latest/plat/imx/imx8m/imx8mm/include/ |
| D | platform_def.h | 157 #define DRAM_PLL_CTRL (IMX_ANAMIX_BASE + 0x50) macro
|
| /trusted-firmware-a-latest/plat/imx/imx8m/imx8mn/include/ |
| D | platform_def.h | 133 #define DRAM_PLL_CTRL (IMX_ANAMIX_BASE + 0x50) macro
|
| /trusted-firmware-a-latest/plat/imx/imx8m/imx8mp/include/ |
| D | platform_def.h | 169 #define DRAM_PLL_CTRL (IMX_ANAMIX_BASE + 0x50) macro
|
