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Searched refs:DRAMC_DPY_CLK_SW_SEL_0 (Results 1 – 4 of 4) sorted by relevance

/trusted-firmware-a-latest/plat/mediatek/mt8188/include/
Dspm_reg.h252 #define DRAMC_DPY_CLK_SW_SEL_0 (SPM_BASE + 0x484) macro
/trusted-firmware-a-latest/plat/mediatek/mt8186/drivers/spm/
Dmt_spm_reg.h249 #define DRAMC_DPY_CLK_SW_SEL_0 (SPM_BASE + 0x490) macro
/trusted-firmware-a-latest/plat/mediatek/mt8195/drivers/spm/
Dmt_spm_reg.h269 #define DRAMC_DPY_CLK_SW_SEL_0 (SPM_BASE + 0x484) macro
/trusted-firmware-a-latest/plat/mediatek/mt8192/drivers/spm/
Dmt_spm_reg.h261 #define DRAMC_DPY_CLK_SW_SEL_0 (SPM_BASE + 0x490) macro