Searched refs:DISP_CTL_BASE (Results 1 – 1 of 1) sorted by relevance
71 #define DISP_CTL_BASE 0x32e28000 macro203 mmio_write_32(DISP_CTL_BASE + 0x4, 0x1fff); in imx_gpc_pm_domain_enable()204 mmio_write_32(DISP_CTL_BASE, 0x7f); in imx_gpc_pm_domain_enable()205 mmio_write_32(DISP_CTL_BASE + 0x8, 0x30000); in imx_gpc_pm_domain_enable()
