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Searched refs:DISABLE_ALL_EXCEPTIONS (Results 1 – 25 of 73) sorted by relevance

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/trusted-firmware-a-latest/plat/socionext/synquacer/
Dsq_image_desc.c28 DISABLE_ALL_EXCEPTIONS),
45 DISABLE_ALL_EXCEPTIONS),
62 DISABLE_ALL_EXCEPTIONS),
/trusted-firmware-a-latest/plat/socionext/uniphier/
Duniphier_image_desc.c50 DISABLE_ALL_EXCEPTIONS),
72 DISABLE_ALL_EXCEPTIONS),
90 DISABLE_ALL_EXCEPTIONS),
/trusted-firmware-a-latest/plat/xilinx/common/
Dplat_startup.c256 DISABLE_ALL_EXCEPTIONS); in xbl_handover()
259 DISABLE_ALL_EXCEPTIONS); in xbl_handover()
273 DISABLE_ALL_EXCEPTIONS); in xbl_handover()
282 DISABLE_ALL_EXCEPTIONS); in xbl_handover()
/trusted-firmware-a-latest/plat/intel/soc/common/
Dbl2_plat_mem_params_desc.c49 DISABLE_ALL_EXCEPTIONS),
69 DISABLE_ALL_EXCEPTIONS),
/trusted-firmware-a-latest/bl1/aarch64/
Dbl1_context_mgmt.c53 DISABLE_ALL_EXCEPTIONS); in bl1_prepare_next_image()
117 (uint64_t)MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in bl1_prepare_next_image()
/trusted-firmware-a-latest/plat/renesas/common/
Dbl2_plat_mem_params_desc.c33 MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
72 DISABLE_ALL_EXCEPTIONS),
/trusted-firmware-a-latest/plat/nxp/common/setup/aarch64/
Dls_bl2_mem_params_desc.c34 DISABLE_ALL_EXCEPTIONS),
97 DISABLE_ALL_EXCEPTIONS),
/trusted-firmware-a-latest/plat/intel/soc/common/aarch64/
Dplatform_common.c57 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in socfpga_get_spsr_for_bl33_entry()
/trusted-firmware-a-latest/plat/brcm/common/
Dbrcm_common.c52 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in brcm_get_spsr_for_bl33_entry()
/trusted-firmware-a-latest/plat/st/stm32mp1/
Dplat_bl2_mem_params_desc.c48 DISABLE_ALL_EXCEPTIONS),
124 DISABLE_ALL_EXCEPTIONS),
/trusted-firmware-a-latest/services/spd/tlkd/
Dtlkd_common.c98 spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in tlkd_init_tlk_ep_state()
103 DISABLE_ALL_EXCEPTIONS); in tlkd_init_tlk_ep_state()
/trusted-firmware-a-latest/plat/arm/common/
Darm_common.c100 spsr = SPSR_64((uint64_t)mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in arm_get_spsr_for_bl33_entry()
121 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in arm_get_spsr_for_bl33_entry()
/trusted-firmware-a-latest/plat/arm/common/aarch64/
Dexecution_state_switch.c131 endianness, DISABLE_ALL_EXCEPTIONS); in arm_execution_state_switch()
140 DISABLE_ALL_EXCEPTIONS); in arm_execution_state_switch()
/trusted-firmware-a-latest/plat/hisilicon/poplar/
Dbl2_plat_setup.c78 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in poplar_get_spsr_for_bl33_entry()
96 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in poplar_get_spsr_for_bl33_entry()
Dbl2_plat_mem_params_desc.c49 DISABLE_ALL_EXCEPTIONS),
69 DISABLE_ALL_EXCEPTIONS),
/trusted-firmware-a-latest/plat/qti/msm8916/sp_min/
Dmsm8916_sp_min_setup.c23 DISABLE_ALL_EXCEPTIONS),
/trusted-firmware-a-latest/plat/imx/imx7/common/
Dimx7_bl2_el3_common.c44 DISABLE_ALL_EXCEPTIONS); in imx7_get_spsr_for_bl32_entry()
51 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in imx7_get_spsr_for_bl33_entry()
/trusted-firmware-a-latest/plat/hisilicon/hikey/
Dhikey_bl2_mem_params_desc.c49 DISABLE_ALL_EXCEPTIONS),
69 DISABLE_ALL_EXCEPTIONS),
/trusted-firmware-a-latest/plat/marvell/armada/common/aarch64/
Dmarvell_bl2_mem_params_desc.c50 DISABLE_ALL_EXCEPTIONS),
70 DISABLE_ALL_EXCEPTIONS),
/trusted-firmware-a-latest/plat/arm/board/juno/
Djuno_bl2_setup.c31 DISABLE_ALL_EXCEPTIONS); in arm_bl2_plat_handle_post_image_load()
/trusted-firmware-a-latest/plat/qti/msm8916/
Dmsm8916_bl31_setup.c29 .bl33.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
/trusted-firmware-a-latest/plat/hisilicon/hikey960/
Dhikey960_bl2_mem_params_desc.c49 DISABLE_ALL_EXCEPTIONS),
69 DISABLE_ALL_EXCEPTIONS),
/trusted-firmware-a-latest/plat/rpi/common/
Drpi3_common.c217 DISABLE_ALL_EXCEPTIONS); in rpi3_get_spsr_for_bl33_entry()
219 return SPSR_64(MODE_EL2, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in rpi3_get_spsr_for_bl33_entry()
/trusted-firmware-a-latest/plat/ti/k3/common/
Dk3_bl31_setup.c61 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in k3_get_spsr_for_bl33_entry()
80 DISABLE_ALL_EXCEPTIONS); in bl31_early_platform_setup2()
/trusted-firmware-a-latest/plat/qemu/common/
Dqemu_bl2_setup.c174 DISABLE_ALL_EXCEPTIONS); in qemu_get_spsr_for_bl32_entry()
195 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in qemu_get_spsr_for_bl33_entry()
199 SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); in qemu_get_spsr_for_bl33_entry()

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