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Searched refs:DDRTIMING_WRTORD_OFST (Results 1 – 6 of 6) sorted by relevance

/trusted-firmware-a-latest/plat/intel/soc/stratix10/include/
Ds10_memory_controller.h91 #define DDRTIMING_WRTORD_OFST 26 macro
/trusted-firmware-a-latest/plat/intel/soc/agilex/include/
Dagilex_memory_controller.h92 #define DDRTIMING_WRTORD_OFST 26 macro
/trusted-firmware-a-latest/plat/intel/soc/agilex5/include/
Dagilex5_memory_controller.h93 #define DDRTIMING_WRTORD_OFST 26 macro
/trusted-firmware-a-latest/plat/intel/soc/agilex/soc/
Dagilex_memory_controller.c264 wr_to_rd << DDRTIMING_WRTORD_OFST| in configure_ddr_sched_ctrl_regs()
/trusted-firmware-a-latest/plat/intel/soc/agilex5/soc/
Dagilex5_memory_controller.c265 wr_to_rd << DDRTIMING_WRTORD_OFST| in configure_ddr_sched_ctrl_regs()
/trusted-firmware-a-latest/plat/intel/soc/stratix10/soc/
Ds10_memory_controller.c293 wr_to_rd << DDRTIMING_WRTORD_OFST| in configure_ddr_sched_ctrl_regs()