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Searched refs:DDRC_DFIMISC (Results 1 – 5 of 5) sorted by relevance

/trusted-firmware-a-latest/plat/imx/imx8m/ddr/
Ddram_retention.c79 mmio_write_32(DDRC_DFIMISC(0), 0x0); in dram_enter_retention()
81 mmio_write_32(DDRC_DFIMISC(0), 0x1f00); in dram_enter_retention()
82 mmio_write_32(DDRC_DFIMISC(0), 0x1f20); in dram_enter_retention()
88 mmio_write_32(DDRC_DFIMISC(0), 0x1f00); in dram_enter_retention()
173 mmio_write_32(DDRC_DFIMISC(0), 0x0); in dram_exit_retention()
190 mmio_write_32(DDRC_DFIMISC(0), 0x20); in dram_exit_retention()
197 mmio_write_32(DDRC_DFIMISC(0), 0x0); in dram_exit_retention()
199 mmio_write_32(DDRC_DFIMISC(0), 0x1); in dram_exit_retention()
Dddr4_dvfs.c126 mmio_write_32(DDRC_DFIMISC(0), 0x00000000 | (pstate << 8)); in sw_pstate()
127 mmio_write_32(DDRC_DFIMISC(0), 0x00000020 | (pstate << 8)); in sw_pstate()
137 mmio_write_32(DDRC_DFIMISC(0), 0x00000000 | (pstate << 8)); in sw_pstate()
Dlpddr4_dvfs.c186 val = mmio_read_32(DDRC_DFIMISC(0)); in lpddr4_swffc()
189 mmio_write_32(DDRC_DFIMISC(0), val); in lpddr4_swffc()
192 mmio_write_32(DDRC_DFIMISC(0), val); in lpddr4_swffc()
203 mmio_clrbits_32(DDRC_DFIMISC(0), 0x20); in lpddr4_swffc()
Ddram.c229 current_fsp = mmio_read_32(DDRC_DFIMISC(0)); in dram_info_init()
/trusted-firmware-a-latest/plat/imx/imx8m/include/
Dddrc.h99 #define DDRC_DFIMISC(X) (DDRC_IPS_BASE_ADDR(X) + 0x1b0) macro