Searched refs:CSS (Results 1 – 10 of 10) sorted by relevance
| /trusted-firmware-a-latest/docs/ |
| D | global_substitutions.txt | 9 .. |CSS| replace:: :term:`CSS`
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| D | glossary.rst | 36 CSS
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| D | porting-guide.rst | 2006 On Arm CSS platforms ``plat_info`` is interpreted as an ``image_info_t`` structure,
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| D | change-log.md | 1261 - **CSS**
2231 - **CSS**
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| /trusted-firmware-a-latest/docs/design/ |
| D | interrupt-framework-design.rst | 90 #. **CSS**. Current Security State. ``0`` when secure and ``1`` when non-secure
98 #. **CSS=0, TEL3=0**. Interrupt is routed to the FEL when execution is in
102 #. **CSS=0, TEL3=1**. Interrupt is routed to EL3 when execution is in secure
106 #. **CSS=1, TEL3=0**. Interrupt is routed to the FEL when execution is in
111 #. **CSS=1, TEL3=1**. Interrupt is routed to EL3 when execution is in
118 #. **CSS=0, TEL3=0**. Interrupt is routed to the FEL when execution is in
125 #. **CSS=0, TEL3=1**. Interrupt is routed to EL3 when execution is in secure
132 #. **CSS=1, TEL3=0**. Interrupt is routed to FEL when execution is in
136 #. **CSS=1, TEL3=1**. Interrupt is routed to EL3 when execution is in
146 #. **CSS=0, TEL3=0**. Interrupt is routed to the FEL when execution is in
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| /trusted-firmware-a-latest/docs/plat/arm/ |
| D | arm-build-options.rst | 106 Arm CSS Platform-Specific Build Options
136 CPU core on reset. This build option can be used on CSS platforms that
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| /trusted-firmware-a-latest/drivers/st/clk/ |
| D | clk-stm32-core.h | 327 #define CSS(_offset, _bit_css) &(struct stm32_clk_css){\ macro
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| D | clk-stm32mp13.c | 1591 CSS(RCC_BDCR, 8),
1596 CSS(RCC_OCENSETR, 11),
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| /trusted-firmware-a-latest/docs/components/ |
| D | firmware-update.rst | 159 Arm CSS platforms like Juno have a System Control Processor (SCP), and these
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| D | exception-handling.rst | 151 as :ref:`CSS=0, TEL3=0 <EL3 interrupts>`.
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