Searched refs:CPU1 (Results 1 – 9 of 9) sorted by relevance
64 cpu = <&CPU1>;84 CPU1: cpu1@100 { label
33 cpu = <&CPU1>;118 CPU1:cpu@100 { label562 cpu = <&CPU1>;
77 #define CPU_1 CPU(1, c1, p1) /* CPU1: 0.1; 1.0 */
112 CPU1:cpu@100 { label
111 CPU1:cpu@100 { label
69 CPU1, enumerator204 if (plat_marvell_cpu_powerdown(CPU1) == -1) in plat_marvell_early_cpu_powerdown()
250 CPU1 | 3 | |
2256 CPU1 updates its per-CPU field of the ``bakery_lock_t`` structure with data cache2257 disabled. CPU1 then issues a DCIVAC operation to invalidate any stale copies of2312 | Lock_0 | for CPU12315 | Lock_1 | for CPU12320 | Lock_N | for CPU12329 operation on Lock_N, the corresponding ``bakery_info_t`` in both CPU0 and CPU1
490 CPU1: cpu@100 {
