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Searched refs:ARM_SP805_TWDG_BASE (Results 1 – 12 of 12) sorted by relevance

/trusted-firmware-a-latest/plat/arm/board/juno/
Djuno_bl1_setup.c96 sp805_refresh(ARM_SP805_TWDG_BASE, 1U); in bl1_plat_fwu_done()
107 sp805_stop(ARM_SP805_TWDG_BASE); in bl1_plat_prepare_exit()
116 sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL); in plat_arm_secure_wdt_start()
121 sp805_stop(ARM_SP805_TWDG_BASE); in plat_arm_secure_wdt_stop()
Djuno_err.c23 sp805_refresh(ARM_SP805_TWDG_BASE, 1U); in plat_arm_error_handler()
/trusted-firmware-a-latest/plat/arm/board/fvp/
Dfvp_bl1_setup.c44 sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL); in plat_arm_secure_wdt_start()
49 sp805_stop(ARM_SP805_TWDG_BASE); in plat_arm_secure_wdt_stop()
73 sp805_refresh(ARM_SP805_TWDG_BASE, 1U); in bl1_plat_fwu_done()
Dfvp_err.c27 sp805_refresh(ARM_SP805_TWDG_BASE, 1U); in plat_arm_error_handler()
/trusted-firmware-a-latest/plat/arm/board/fvp_ve/
Dfvp_ve_bl1_setup.c22 sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL); in plat_arm_secure_wdt_start()
27 sp805_stop(ARM_SP805_TWDG_BASE); in plat_arm_secure_wdt_stop()
/trusted-firmware-a-latest/plat/arm/board/fvp_r/
Dfvp_r_bl1_setup.c126 sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL); in plat_arm_secure_wdt_start()
131 sp805_stop(ARM_SP805_TWDG_BASE); in plat_arm_secure_wdt_stop()
182 sp805_refresh(ARM_SP805_TWDG_BASE, 1U); in bl1_plat_fwu_done()
Dfvp_r_err.c43 sp805_refresh(ARM_SP805_TWDG_BASE, 1U); in plat_arm_error_handler()
/trusted-firmware-a-latest/plat/brcm/board/stingray/src/
Dbl2_setup.c622 sp805_stop(ARM_SP805_TWDG_BASE); in plat_bcm_bl2_plat_arch_setup()
634 sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL); in plat_bcm_bl2_plat_arch_setup()
Dbl31_setup.c1069 sp805_stop(ARM_SP805_TWDG_BASE); in DEFINE_RENAME_SYSREG_RW_FUNCS()
/trusted-firmware-a-latest/plat/arm/board/fvp_ve/include/
Dplatform_def.h150 #define ARM_SP805_TWDG_BASE UL(0x1C0F0000) macro
/trusted-firmware-a-latest/include/plat/arm/common/
Darm_def.h478 #define ARM_SP805_TWDG_BASE PLAT_ARM_SP805_TWDG_BASE macro
480 #define ARM_SP805_TWDG_BASE UL(0x2a490000) macro
/trusted-firmware-a-latest/plat/brcm/board/stingray/include/
Dsr_def.h307 #define ARM_SP805_TWDG_BASE 0x68b30000 macro