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Searched refs:APU_RPC_BASE (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-a-latest/plat/mediatek/drivers/apusys/mt8188/
Dapusys_power.c135 mmio_setbits_32(APU_RPC_BASE + APU_RPC_TOP_SEL_1, AFC_ENA); in apusys_kernel_apusys_pwr_top_on()
137 mmio_write_32(APU_RPC_BASE + APU_RPC_TOP_CON, REG_WAKEUP_SET); in apusys_kernel_apusys_pwr_top_on()
139 ret = apu_poll(APU_RPC_BASE + APU_RPC_INTF_PWR_RDY, in apusys_kernel_apusys_pwr_top_on()
147 ret = apu_poll(APU_RPC_BASE + APU_RPC_STATUS, in apusys_kernel_apusys_pwr_top_on()
170 mmio_write_32(APU_RPC_BASE + APU_RPC_TOP_CON, REG_WAKEUP_CLR); in apu_sleep_rpc_rcx()
174 mmio_setbits_32(APU_RPC_BASE + APU_RPC_TOP_SEL, (RPC_CTRL | RSV10)); in apu_sleep_rpc_rcx()
178 mmio_setbits_32(APU_RPC_BASE + APU_RPC_TOP_CON, CLR_IRQ); in apu_sleep_rpc_rcx()
182 mmio_setbits_32(APU_RPC_BASE + APU_RPC_TOP_CON, SLEEP_REQ); in apu_sleep_rpc_rcx()
209 ret = apu_poll(APU_RPC_BASE + APU_RPC_INTF_PWR_RDY, in apusys_kernel_apusys_pwr_top_off()
318 mmio_write_32(APU_RPC_BASE + APU_RPC_HW_CON, BUCK_PROT_REQ_SET); in apu_buck_off_cfg()
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Dapusys_power.h60 #define APU_RPC_BASE (APU_RPCTOP) macro