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Searched refs:APU_ACC_CONFG_SET1 (Results 1 – 4 of 4) sorted by relevance

/trusted-firmware-a-latest/plat/mediatek/mt8195/drivers/apusys/
Dapupwr_clkctl.c32 APU_ACC_CONFG_SET1, APU_ACC_CONFG_SET2,
55 { APU_ACC_CONFG_SET1, BIT(BIT_SEL_APU) },
57 { APU_ACC_CONFG_SET1, BIT(BIT_SEL_APU_DIV2) },
227 acc_set0 = APU_ACC_CONFG_SET1; in apupwr_smc_pll_set_rate()
Dapupwr_clkctl_def.h159 #define APU_ACC_CONFG_SET1 (APU_ACC_BASE + 0x004) macro
/trusted-firmware-a-latest/plat/mediatek/drivers/apusys/mt8188/
Dapusys_power.h131 #define APU_ACC_CONFG_SET1 (0x0004) macro
Dapusys_power.c303 mmio_write_32(APU_ACC_BASE + APU_ACC_CONFG_SET1, HW_CTRL_EN); in apu_acc_init()