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Searched refs:speed (Results 1 – 25 of 28) sorted by relevance

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/trusted-firmware-a-3.7.0/include/drivers/brcm/i2c/
Di2c.h45 int i2c_init(uint32_t bus_id, int speed);
60 int i2c_set_bus_speed(uint32_t bus_id, uint32_t speed);
/trusted-firmware-a-3.7.0/drivers/st/gpio/
Dstm32_gpio.c29 uint32_t speed, uint32_t pull, uint32_t od,
74 uint32_t speed = GPIO_SPEED_LOW; in dt_set_gpio_config() local
89 speed = fdt32_to_cpu(*slewrate); in dt_set_gpio_config()
170 set_gpio(bank, pin, mode, type, speed, pull, od, alternate, status); in dt_set_gpio_config()
226 uint32_t speed, uint32_t pull, uint32_t od, in set_gpio() argument
246 speed << (pin << 1U)); in set_gpio()
/trusted-firmware-a-3.7.0/fdts/
Dstm32mp15xx-dhcor-avenger96.dtsi65 /* On Low speed expansion header */
73 /* On Low speed expansion header */
Dstm32mp15-ddr.dtsi8 st,mem-speed = <DDR_MEM_SPEED>;
Dstm32mp157a-avenger96.dts290 /* On Low speed expansion header */
298 /* On Low speed expansion header */
Dstm32mp13-ddr.dtsi8 st,mem-speed = <DDR_MEM_SPEED>;
/trusted-firmware-a-3.7.0/include/drivers/st/
Dstm32mp_ddr.h56 uint32_t speed; /* in kHz */ member
/trusted-firmware-a-3.7.0/drivers/brcm/i2c/
Di2c.c477 static void iproc_i2c_init(uint32_t bus_id, int speed) in iproc_i2c_init() argument
517 if (i2c_set_bus_speed(bus_id, speed)) { in iproc_i2c_init()
549 int i2c_init(uint32_t bus_id, int speed) in i2c_init() argument
556 iproc_i2c_init(bus_id, speed); in i2c_init()
834 int i2c_set_bus_speed(uint32_t bus_id, uint32_t speed) in i2c_set_bus_speed() argument
836 switch (speed) { in i2c_set_bus_speed()
/trusted-firmware-a-3.7.0/drivers/st/ddr/
Dstm32mp_ram.c21 ret = fdt_read_uint32(fdt, node, "st,mem-speed", &info->speed); in stm32mp_ddr_dt_get_info()
Dstm32mp1_ddr.c583 VERBOSE("speed = %u kHz\n", config->info.speed); in stm32mp1_ddr_init()
602 if (stm32mp1_ddr_clk_enable(priv, config->info.speed) != 0) { in stm32mp1_ddr_init()
/trusted-firmware-a-3.7.0/include/drivers/brcm/emmc/
Demmc_chal_sd.h171 int32_t chal_sd_config(CHAL_HANDLE *sdHandle, uint32_t speed,
197 void chal_sd_set_speed(CHAL_HANDLE *sdHandle, uint32_t speed);
Demmc_csl_sd.h87 int32_t set_config(struct sd_handle *handle, uint32_t speed,
Demmc_csl_sdcmd.h97 uint32_t speed; /* card speed */ member
Demmc_csl_sdprot.h394 uint32_t speed:8; member
/trusted-firmware-a-3.7.0/docs/plat/marvell/armada/
Duart-booting.rst19 speed with 115200 bauds. Target ``mrvl_uart`` produces GZIPed TAR archive ``uart-images.tgz.bin``
63 To download single file image built by ``mrvl_flash`` target at the highest speed, run:
70 non-secure boot variant (like Wtpdownloader) but at the highest speed, first unpack
/trusted-firmware-a-3.7.0/drivers/brcm/emmc/
Demmc_chal_sd.c298 void chal_sd_set_speed(CHAL_HANDLE *sd_handle, uint32_t speed) in chal_sd_set_speed() argument
307 if (speed) { in chal_sd_set_speed()
952 int32_t chal_sd_config(CHAL_HANDLE *sd_handle, uint32_t speed, uint32_t retry, in chal_sd_config() argument
962 handle->cfg.speedMode = speed; in chal_sd_config()
972 chal_sd_set_speed(sd_handle, speed); in chal_sd_config()
Demmc_csl_sdcard.c448 emmc_global_vars_ptr->cardData.csd.mmc.speed); in init_mmc_card()
450 emmc_global_vars_ptr->cardData.csd.mmc.speed); in init_mmc_card()
1047 int32_t set_config(struct sd_handle *handle, uint32_t speed, uint32_t retry, in set_config() argument
1058 rel = chal_sd_config((CHAL_HANDLE *)handle->device, speed, retry, in set_config()
Demmc_csl_sdcmd.c173 card->csd.mmc.speed = resp.data.r2.rsp3 >> 24; in sd_cmd9()
/trusted-firmware-a-3.7.0/drivers/nxp/ddr/nxp-ddr/
Dddr.c436 const unsigned long speed = priv->clk / 1000000; in cal_board_params() local
454 if (speed <= prt->speed_bin) { in cal_board_params()
461 ERROR("timing no match for speed %lu\n", speed); in cal_board_params()
Dregs.c1154 struct speed { in skip_caslat() struct
1206 const struct speed bin_0[] = { in skip_caslat()
1248 const struct speed bin_3ds[] = { in skip_caslat()
1256 const struct speed *bin; in skip_caslat()
/trusted-firmware-a-3.7.0/drivers/marvell/comphy/
Dphy-comphy-cp110.c843 uint32_t mask, data, speed = COMPHY_GET_SPEED(comphy_mode); in mvebu_cp110_comphy_xfi_power_on() local
875 if ((speed != COMPHY_SPEED_5_15625G) && in mvebu_cp110_comphy_xfi_power_on()
876 (speed != COMPHY_SPEED_10_3125G) && in mvebu_cp110_comphy_xfi_power_on()
877 (speed != COMPHY_SPEED_DEFAULT)) { in mvebu_cp110_comphy_xfi_power_on()
954 data = (speed == COMPHY_SPEED_5_15625G) ? in mvebu_cp110_comphy_xfi_power_on()
982 if (speed == COMPHY_SPEED_5_15625G) { in mvebu_cp110_comphy_xfi_power_on()
1008 if (speed == COMPHY_SPEED_5_15625G) { in mvebu_cp110_comphy_xfi_power_on()
1055 if (speed == COMPHY_SPEED_5_15625G) { in mvebu_cp110_comphy_xfi_power_on()
1092 if (speed == COMPHY_SPEED_5_15625G) { in mvebu_cp110_comphy_xfi_power_on()
/trusted-firmware-a-3.7.0/docs/plat/
Dnvidia-tegra.rst11 a dedicated 2 MiB Level-2 unified cache. A high speed coherency fabric connects
29 high speed coherency fabric connects these two processor complexes and allows
/trusted-firmware-a-3.7.0/docs/plat/nxp/
Dnxp-layerscape.rst78 * 16 Mbyte high-speed SPI flash
90 USB 3.0: two super speed USB 3.0 type A ports
114 of high-speed SerDes ports.
/trusted-firmware-a-3.7.0/docs/process/
Dcode-review-guidelines.rst78 may try the following actions to speed it up:
Dcontributing.rst38 review so this will speed up the review process.

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