| /trusted-firmware-a-3.7.0/plat/hisilicon/hikey/ |
| D | hisi_pwrc.c | 72 unsigned int reg, sec_entrypoint; in hisi_pwrc_setup() local
76 sec_entrypoint = PWRCTRL_ACPU_ASM_CODE_BASE; in hisi_pwrc_setup()
77 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(0), sec_entrypoint >> 2); in hisi_pwrc_setup()
78 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(1), sec_entrypoint >> 2); in hisi_pwrc_setup()
79 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(2), sec_entrypoint >> 2); in hisi_pwrc_setup()
80 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(3), sec_entrypoint >> 2); in hisi_pwrc_setup()
81 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(4), sec_entrypoint >> 2); in hisi_pwrc_setup()
82 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(5), sec_entrypoint >> 2); in hisi_pwrc_setup()
83 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(6), sec_entrypoint >> 2); in hisi_pwrc_setup()
84 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(7), sec_entrypoint >> 2); in hisi_pwrc_setup()
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| /trusted-firmware-a-3.7.0/plat/allwinner/common/ |
| D | sunxi_pm.c | 43 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
52 sec_entrypoint & 0xffffffff); in plat_setup_psci_ops()
54 sec_entrypoint >> 32); in plat_setup_psci_ops()
57 sec_entrypoint & 0xffffffff); in plat_setup_psci_ops()
59 sec_entrypoint >> 32); in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mn/ |
| D | imx8mn_psci.c | 35 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
39 imx_mailbox_init(sec_entrypoint); in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mp/ |
| D | imx8mp_psci.c | 35 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
39 imx_mailbox_init(sec_entrypoint); in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/marvell/armada/common/ |
| D | marvell_pm.c | 52 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
58 marvell_program_mailbox(sec_entrypoint); in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mm/ |
| D | imx8mm_psci.c | 36 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
40 imx_mailbox_init(sec_entrypoint); in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/aspeed/ast2700/ |
| D | plat_pm.c | 56 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
59 sec_ep = sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/arm/board/a5ds/ |
| D | a5ds_pm.c | 66 int __init plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
70 *mailbox = sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/arm/board/arm_fpga/ |
| D | fpga_pm.c | 95 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
98 fpga_sec_entrypoint = sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/qti/msm8916/ |
| D | msm8916_pm.c | 90 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
98 msm8916_entry_point = sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/brcm/board/stingray/src/ |
| D | pm.c | 124 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
128 plat_sec_entrypoint = sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/socionext/synquacer/ |
| D | sq_psci.c | 197 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
203 *sq_sec_ep = sec_entrypoint; in plat_setup_psci_ops()
207 sq_sec_entrypoint = sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/qemu/qemu_sbsa/ |
| D | sbsa_pm.c | 227 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
232 *mailbox = sec_entrypoint; in plat_setup_psci_ops()
233 secure_entrypoint = (unsigned long)sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/qemu/common/ |
| D | qemu_pm.c | 247 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
252 *mailbox = sec_entrypoint; in plat_setup_psci_ops()
253 secure_entrypoint = (unsigned long) sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/arm/board/fvp_ve/ |
| D | fvp_ve_pm.c | 19 int __init plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
|
| /trusted-firmware-a-3.7.0/plat/mediatek/lib/pm/ |
| D | mtk_pm.c | 104 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
108 mtk_secure_entrypoint = sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/arm/common/ |
| D | arm_pm.c | 210 int __init plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
216 plat_arm_program_trusted_mailbox(sec_entrypoint); in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/socionext/uniphier/ |
| D | uniphier_psci.c | 121 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
124 uniphier_sec_entrypoint = sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/st/stm32mp1/ |
| D | stm32mp1_pm.c | 234 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
237 stm32_sec_entrypoint = sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/imx/imx93/ |
| D | imx93_psci.c | 241 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
245 secure_entrypoint = sec_entrypoint; in plat_setup_psci_ops()
246 imx_set_cpu_boot_entry(0, sec_entrypoint); in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mq/ |
| D | imx8mq_psci.c | 148 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
151 imx_mailbox_init(sec_entrypoint); in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/amlogic/axg/ |
| D | axg_pm.c | 160 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
163 axg_sec_entrypoint = sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/hisilicon/poplar/ |
| D | plat_pm.c | 165 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
171 mmio_write_32((uintptr_t)REG_PERI_CPU_RVBARADDR, sec_entrypoint); in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/amlogic/gxbb/ |
| D | gxbb_pm.c | 184 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
187 gxbb_sec_entrypoint = sec_entrypoint; in plat_setup_psci_ops()
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| /trusted-firmware-a-3.7.0/plat/amlogic/g12a/ |
| D | g12a_pm.c | 208 int plat_setup_psci_ops(uintptr_t sec_entrypoint, in plat_setup_psci_ops() argument
211 g12a_sec_entrypoint = sec_entrypoint; in plat_setup_psci_ops()
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