| /trusted-firmware-a-3.7.0/drivers/brcm/i2c/ |
| D | i2c.c | 131 uint32_t regval; in iproc_dump_i2c_regs() local
140 regval = iproc_i2c_reg_read(bus_id, SMB_CFG_REG); in iproc_dump_i2c_regs()
141 INFO("SMB_CFG_REG=0x%x\n", regval); in iproc_dump_i2c_regs()
143 regval = iproc_i2c_reg_read(bus_id, SMB_TIMGCFG_REG); in iproc_dump_i2c_regs()
144 INFO("SMB_TIMGCFG_REG=0x%x\n", regval); in iproc_dump_i2c_regs()
146 regval = iproc_i2c_reg_read(bus_id, SMB_ADDR_REG); in iproc_dump_i2c_regs()
147 INFO("SMB_ADDR_REG=0x%x\n", regval); in iproc_dump_i2c_regs()
149 regval = iproc_i2c_reg_read(bus_id, SMB_MSTRFIFOCTL_REG); in iproc_dump_i2c_regs()
150 INFO("SMB_MSTRFIFOCTL_REG=0x%x\n", regval); in iproc_dump_i2c_regs()
152 regval = iproc_i2c_reg_read(bus_id, SMB_SLVFIFOCTL_REG); in iproc_dump_i2c_regs()
[all …]
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| /trusted-firmware-a-3.7.0/plat/hisilicon/poplar/ |
| D | plat_pm.c | 39 unsigned int regval, regval_bak; in poplar_pwr_domain_on() local
47 regval = mmio_read_32((uintptr_t)(REG_BASE_CRG + REG_CPU_RST)); in poplar_pwr_domain_on()
48 regval &= ~(1 << (cpu + CPU_REG_COREPO_SRST)); in poplar_pwr_domain_on()
49 mmio_write_32((uintptr_t)(REG_BASE_CRG + REG_CPU_RST), regval); in poplar_pwr_domain_on()
52 regval = mmio_read_32((uintptr_t)(REG_BASE_CRG + REG_CPU_RST)); in poplar_pwr_domain_on()
53 regval &= ~(1 << (cpu + CPU_REG_CORE_SRST)); in poplar_pwr_domain_on()
54 mmio_write_32((uintptr_t)(REG_BASE_CRG + REG_CPU_RST), regval); in poplar_pwr_domain_on()
57 regval = regval_bak & (~(1 << REG_CPU_LP_CPU_SW_BEGIN)); in poplar_pwr_domain_on()
58 mmio_write_32((uintptr_t)(REG_BASE_CRG + REG_CPU_LP), regval); in poplar_pwr_domain_on()
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| /trusted-firmware-a-3.7.0/plat/xilinx/zynqmp/pm_service/ |
| D | pm_api_pinctrl.c | 27 uint8_t regval; member
40 .regval = 0x20,
46 .regval = 0x20,
52 .regval = 0x02,
58 .regval = 0x02,
64 .regval = 0x02,
70 .regval = 0x02,
76 .regval = 0x02,
82 .regval = 0x00,
88 .regval = 0x40,
[all …]
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| /trusted-firmware-a-3.7.0/drivers/renesas/common/ddr/ddr_a/ |
| D | ddr_init_e3.c | 39 uint32_t regval, j; in init_ddr() local
662 regval = mmio_read_32(DBSC_DBPDRGD_0) & in init_ddr()
666 regval); in init_ddr()
669 regval = mmio_read_32(DBSC_DBPDRGD_0) & in init_ddr()
671 mmio_write_32(DBSC_DBPDRGD_0, regval); in init_ddr()
675 regval = mmio_read_32(DBSC_DBPDRGD_0) & in init_ddr()
677 mmio_write_32(DBSC_DBPDRGD_0, regval | in init_ddr()
680 regval = (mmio_read_32(DBSC_DBPDRGD_0)); in init_ddr()
681 rdqsd_0c = (regval & 0xFF00) >> 8; in init_ddr()
682 rdqsnd_0c = (regval & 0xFF0000) >> 16; in init_ddr()
[all …]
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| /trusted-firmware-a-3.7.0/plat/nvidia/tegra/common/ |
| D | tegra_sip_calls.c | 41 uint32_t regval, local_x2_32 = (uint32_t)x2; in tegra_sip_handler() local
84 regval = mmio_read_32(TEGRA_CAR_RESET_BASE + in tegra_sip_handler()
86 if ((regval & GPU_RESET_BIT) == 0U) { in tegra_sip_handler()
97 regval = mmio_read_32(TEGRA_CAR_RESET_BASE + in tegra_sip_handler()
99 if ((regval & GPU_RESET_BIT) == 0U) { in tegra_sip_handler()
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| /trusted-firmware-a-3.7.0/drivers/renesas/common/ |
| D | common.c | 13 void __attribute__ ((section(".system_ram"))) cpg_write(uintptr_t regadr, uint32_t regval) in cpg_write() argument
15 void cpg_write(uintptr_t regadr, uint32_t regval) in cpg_write()
18 uint32_t value = regval; in cpg_write()
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| /trusted-firmware-a-3.7.0/plat/mediatek/drivers/dp/ |
| D | mt_dp.c | 29 uint32_t regval = 0UL; in dp_secure_handler() local
63 regval = (VIDEO_MUTE_SEL_SECURE_FLDMASK | fldmask); in dp_secure_handler()
65 regval, regmsk); in dp_secure_handler()
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| /trusted-firmware-a-3.7.0/drivers/brcm/emmc/ |
| D | emmc_csl_sdcard.c | 972 uint32_t regval, cmd12, time = 0; in wait_for_event() local
981 regval = chal_sd_get_irq_status((CHAL_HANDLE *)handle->device); in wait_for_event()
983 if (regval & SD4_EMMC_TOP_INTR_DMAIRQ_MASK) { in wait_for_event()
998 ERROR("EMMC: INT[0x%x]\n", regval); in wait_for_event()
1002 if (regval & SD4_EMMC_TOP_INTR_CTOERR_MASK) { in wait_for_event()
1004 handle->device->ctrl.cmdIndex, regval); in wait_for_event()
1010 if (regval & SD_CMD_ERROR_FLAGS) { in wait_for_event()
1012 handle->device->ctrl.cmdIndex, regval); in wait_for_event()
1027 if (SD_DATA_ERROR_FLAGS & regval) { in wait_for_event()
1029 handle->device->ctrl.cmdIndex, regval); in wait_for_event()
[all …]
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| /trusted-firmware-a-3.7.0/plat/hisilicon/hikey960/drivers/ipc/ |
| D | hisi_ipc.c | 97 unsigned int regval; in hisi_ipc_send_cmd_with_ack() local
107 regval = mmio_read_32(IPC_MBX_SOURCE_REG(mbox)); in hisi_ipc_send_cmd_with_ack()
108 if (regval == source) in hisi_ipc_send_cmd_with_ack()
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| /trusted-firmware-a-3.7.0/plat/renesas/common/include/ |
| D | rcar_private.h | 101 void cpg_write(uintptr_t regadr, uint32_t regval);
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