| /trusted-firmware-a-3.7.0/lib/libfdt/ |
| D | fdt_sw.c | 190 struct fdt_reserve_entry *re; in fdt_add_reservemap_entry() local
196 if ((offset + sizeof(*re)) > fdt_totalsize(fdt)) in fdt_add_reservemap_entry()
199 re = (struct fdt_reserve_entry *)((char *)fdt + offset); in fdt_add_reservemap_entry()
200 re->address = cpu_to_fdt64(addr); in fdt_add_reservemap_entry()
201 re->size = cpu_to_fdt64(size); in fdt_add_reservemap_entry()
203 fdt_set_off_dt_struct(fdt, offset + sizeof(*re)); in fdt_add_reservemap_entry()
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| D | fdt_rw.c | 157 struct fdt_reserve_entry *re; in fdt_add_mem_rsv() local
162 re = fdt_mem_rsv_w_(fdt, fdt_num_mem_rsv(fdt)); in fdt_add_mem_rsv()
163 err = fdt_splice_mem_rsv_(fdt, re, 0, 1); in fdt_add_mem_rsv()
167 re->address = cpu_to_fdt64(address); in fdt_add_mem_rsv()
168 re->size = cpu_to_fdt64(size); in fdt_add_mem_rsv()
174 struct fdt_reserve_entry *re = fdt_mem_rsv_w_(fdt, n); in fdt_del_mem_rsv() local
181 return fdt_splice_mem_rsv_(fdt, re, 1, 0); in fdt_del_mem_rsv()
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| D | fdt_ro.c | 177 const struct fdt_reserve_entry *re; in fdt_get_mem_rsv() local
180 re = fdt_mem_rsv(fdt, n); in fdt_get_mem_rsv()
181 if (!can_assume(VALID_INPUT) && !re) in fdt_get_mem_rsv()
184 *address = fdt64_ld_(&re->address); in fdt_get_mem_rsv()
185 *size = fdt64_ld_(&re->size); in fdt_get_mem_rsv()
192 const struct fdt_reserve_entry *re; in fdt_num_mem_rsv() local
194 for (i = 0; (re = fdt_mem_rsv(fdt, i)) != NULL; i++) { in fdt_num_mem_rsv()
195 if (fdt64_ld_(&re->size) == 0) in fdt_num_mem_rsv()
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| /trusted-firmware-a-3.7.0/tools/memory/memory/ |
| D | buildparser.py | 7 import re
59 filter(lambda s: re.match(regex, s[0]), symbols),
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| D | elfparser.py | 7 import re
117 region_symbols = filter(lambda s: re.match(expr, s), self._symbols)
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| D | mapparser.py | 7 from re import match, search
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| /trusted-firmware-a-3.7.0/tools/sptool/ |
| D | sp_mk_generator.py | 52 import re
129 uuid_parsed = re.findall("0x([0-9a-f]+)", uuid_lines[0])
140 load_address_parsed = re.search("(0x[0-9a-f]+)", load_address_lines[0])
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| /trusted-firmware-a-3.7.0/plat/arm/board/rdn2/fdts/ |
| D | rdn2_tb_fw_config.dts | 23 * BL2 in order to locate and re-use the heap.
|
| /trusted-firmware-a-3.7.0/plat/arm/board/n1sdp/fdts/ |
| D | n1sdp_tb_fw_config.dts | 22 * BL2 in order to locate and re-use the heap.
|
| /trusted-firmware-a-3.7.0/plat/arm/board/rde1edge/fdts/ |
| D | rde1edge_tb_fw_config.dts | 23 * BL2 in order to locate and re-use the heap.
|
| /trusted-firmware-a-3.7.0/plat/arm/board/morello/fdts/ |
| D | morello_tb_fw_config.dts | 22 * BL2 in order to locate and re-use the heap.
|
| /trusted-firmware-a-3.7.0/plat/arm/board/rdv1/fdts/ |
| D | rdv1_tb_fw_config.dts | 23 * BL2 in order to locate and re-use the heap.
|
| /trusted-firmware-a-3.7.0/plat/arm/board/rdv1mc/fdts/ |
| D | rdv1mc_tb_fw_config.dts | 23 * BL2 in order to locate and re-use the heap.
|
| /trusted-firmware-a-3.7.0/plat/arm/board/sgi575/fdts/ |
| D | sgi575_tb_fw_config.dts | 23 * BL2 in order to locate and re-use the heap.
|
| /trusted-firmware-a-3.7.0/plat/arm/board/rdn1edge/fdts/ |
| D | rdn1edge_tb_fw_config.dts | 22 * BL2 in order to locate and re-use the heap.
|
| /trusted-firmware-a-3.7.0/plat/arm/board/tc/fdts/ |
| D | tc_tb_fw_config.dts | 24 * BL2 in order to locate and re-use the heap.
|
| /trusted-firmware-a-3.7.0/lib/romlib/ |
| D | romlib_generator.py | 13 import re
250 matching_symbol = re.search("([0-9A-Fa-f]+) . \\.text", str(symbols))
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| /trusted-firmware-a-3.7.0/plat/arm/board/juno/fdts/ |
| D | juno_tb_fw_config.dts | 21 * BL2 in order to locate and re-use the heap.
|
| /trusted-firmware-a-3.7.0/docs/plat/st/ |
| D | stm32mpus.rst | 57 - | ``STM32MP_RECONFIGURE_CONSOLE``: to re-configure crash console (especially after BL2).
|
| /trusted-firmware-a-3.7.0/plat/arm/board/fvp/fdts/ |
| D | fvp_tb_fw_config.dts | 25 * BL2 in order to locate and re-use the heap.
|
| /trusted-firmware-a-3.7.0/docs/plat/ |
| D | nvidia-tegra.rst | 44 re-fetched and executed from the instruction cache as long as needed and
47 Effectively, this reduces the need to re-optimize the software routines.
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| D | hikey960.rst | 68 *Make sure that you're using the sgdisk in the l-loader directory.*
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| /trusted-firmware-a-3.7.0/docs/design_documents/ |
| D | psci_osi_mode.rst | 92 * For their ARM32 platforms, they're using OS-initiated mode implemented in
99 * For their mobile platforms, they're using OS-initiated mode implemented in
101 * For their Chrome OS platforms, they're using platform-coordinated mode in
106 * They're using platform-coordinated mode in TF-A with custom driver logic to
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| /trusted-firmware-a-3.7.0/docs/components/ |
| D | debugfs-design.rst | 104 the internal work buffer, and re-entrancy into the filesystem layers.
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| /trusted-firmware-a-3.7.0/docs/security_advisories/ |
| D | security-advisory-tfv-7.rst | 41 control bit to prevent the re-ordering of stores and loads.
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