| /trusted-firmware-a-3.7.0/plat/mediatek/mt8183/drivers/gpio/ |
| D | mtgpio.c | 34 void mt_set_gpio_dir_chip(uint32_t pin, int dir) in mt_set_gpio_dir_chip() argument
38 assert(pin < MAX_GPIO_PIN); in mt_set_gpio_dir_chip()
41 pos = pin / MAX_GPIO_REG_BITS; in mt_set_gpio_dir_chip()
42 bit = pin % MAX_GPIO_REG_BITS; in mt_set_gpio_dir_chip()
50 int mt_get_gpio_dir_chip(uint32_t pin) in mt_get_gpio_dir_chip() argument
55 assert(pin < MAX_GPIO_PIN); in mt_get_gpio_dir_chip()
57 pos = pin / MAX_GPIO_REG_BITS; in mt_get_gpio_dir_chip()
58 bit = pin % MAX_GPIO_REG_BITS; in mt_get_gpio_dir_chip()
64 void mt_set_gpio_out_chip(uint32_t pin, int output) in mt_set_gpio_out_chip() argument
68 assert(pin < MAX_GPIO_PIN); in mt_set_gpio_out_chip()
[all …]
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| /trusted-firmware-a-3.7.0/plat/mediatek/drivers/gpio/ |
| D | mtgpio_common.c | 29 static void mt_set_gpio_dir_chip(uint32_t pin, int dir) in mt_set_gpio_dir_chip() argument
33 assert(pin < MAX_GPIO_PIN); in mt_set_gpio_dir_chip()
36 pos = pin / MAX_GPIO_REG_BITS; in mt_set_gpio_dir_chip()
37 bit = pin % MAX_GPIO_REG_BITS; in mt_set_gpio_dir_chip()
46 static int mt_get_gpio_dir_chip(uint32_t pin) in mt_get_gpio_dir_chip() argument
51 assert(pin < MAX_GPIO_PIN); in mt_get_gpio_dir_chip()
53 pos = pin / MAX_GPIO_REG_BITS; in mt_get_gpio_dir_chip()
54 bit = pin % MAX_GPIO_REG_BITS; in mt_get_gpio_dir_chip()
60 static void mt_set_gpio_out_chip(uint32_t pin, int output) in mt_set_gpio_out_chip() argument
64 assert(pin < MAX_GPIO_PIN); in mt_set_gpio_out_chip()
[all …]
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| D | mtgpio_common.h | 108 uintptr_t mt_gpio_find_reg_addr(uint32_t pin);
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| /trusted-firmware-a-3.7.0/drivers/st/gpio/ |
| D | stm32_gpio.c | 28 static void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t type,
103 uint32_t pin; in dt_set_gpio_config() local
116 pin = (pincfg & DT_GPIO_PIN_MASK) >> DT_GPIO_PIN_SHIFT; in dt_set_gpio_config()
170 set_gpio(bank, pin, mode, type, speed, pull, od, alternate, status); in dt_set_gpio_config()
225 static void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t type, in set_gpio() argument
232 assert(pin <= GPIO_PIN_MAX); in set_gpio()
237 (uint32_t)GPIO_MODE_MASK << (pin << 1U), in set_gpio()
238 mode << (pin << 1U)); in set_gpio()
241 (uint32_t)GPIO_TYPE_MASK << pin, in set_gpio()
242 type << pin); in set_gpio()
[all …]
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| /trusted-firmware-a-3.7.0/plat/st/common/include/ |
| D | stm32mp_shared_resources.h | 33 void stm32mp_register_secure_gpio(unsigned int bank, unsigned int pin);
34 void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin);
49 unsigned int pin __unused) in stm32mp_register_secure_gpio()
54 unsigned int pin __unused) in stm32mp_register_non_secure_gpio()
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| /trusted-firmware-a-3.7.0/plat/mediatek/drivers/gpio/mt8188/ |
| D | mtgpio.c | 11 uintptr_t mt_gpio_find_reg_addr(uint32_t pin) in mt_gpio_find_reg_addr() argument
16 assert(pin < MAX_GPIO_PIN); in mt_gpio_find_reg_addr()
18 gpio_info = mt_pin_infos[pin]; in mt_gpio_find_reg_addr()
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| /trusted-firmware-a-3.7.0/plat/mediatek/mt8186/drivers/gpio/ |
| D | mtgpio.c | 11 uintptr_t mt_gpio_find_reg_addr(uint32_t pin) in mt_gpio_find_reg_addr() argument
16 assert(pin < MAX_GPIO_PIN); in mt_gpio_find_reg_addr()
18 gpio_info = mt_pin_infos[pin]; in mt_gpio_find_reg_addr()
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| /trusted-firmware-a-3.7.0/plat/mediatek/mt8195/drivers/gpio/ |
| D | mtgpio.c | 11 uintptr_t mt_gpio_find_reg_addr(uint32_t pin) in mt_gpio_find_reg_addr() argument
16 assert(pin < MAX_GPIO_PIN); in mt_gpio_find_reg_addr()
18 gpio_info = mt_pin_infos[pin]; in mt_gpio_find_reg_addr()
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| /trusted-firmware-a-3.7.0/plat/mediatek/mt8192/drivers/gpio/ |
| D | mtgpio.c | 11 uintptr_t mt_gpio_find_reg_addr(uint32_t pin) in mt_gpio_find_reg_addr() argument
16 assert(pin < MAX_GPIO_PIN); in mt_gpio_find_reg_addr()
18 gpio_info = mt_pin_infos[pin]; in mt_gpio_find_reg_addr()
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| /trusted-firmware-a-3.7.0/plat/allwinner/common/ |
| D | sunxi_common.c | 86 void sunxi_set_gpio_out(char port, int pin, bool level_high) in sunxi_set_gpio_out() argument
99 mmio_setbits_32(port_base + 0x10, BIT(pin)); in sunxi_set_gpio_out()
101 mmio_clrbits_32(port_base + 0x10, BIT(pin)); in sunxi_set_gpio_out()
104 mmio_clrsetbits_32(port_base + (pin / 8) * 4, in sunxi_set_gpio_out()
105 0x7 << ((pin % 8) * 4), in sunxi_set_gpio_out()
106 0x1 << ((pin % 8) * 4)); in sunxi_set_gpio_out()
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| /trusted-firmware-a-3.7.0/plat/st/stm32mp1/ |
| D | stm32mp1_shared_resources.c | 313 void stm32mp_register_secure_gpio(unsigned int bank, unsigned int pin) in stm32mp_register_secure_gpio() argument
317 register_periph(STM32MP1_SHRES_GPIOZ(pin), SHRES_SECURE); in stm32mp_register_secure_gpio()
325 void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin) in stm32mp_register_non_secure_gpio() argument
329 register_periph(STM32MP1_SHRES_GPIOZ(pin), SHRES_NON_SECURE); in stm32mp_register_non_secure_gpio()
558 uint32_t pin; in set_gpio_secure_configuration() local
560 for (pin = 0U; pin < get_gpioz_nbpin(); pin++) { in set_gpio_secure_configuration()
561 bool secure_state = periph_is_secure(STM32MP1_SHRES_GPIOZ(pin)); in set_gpio_secure_configuration()
563 set_gpio_secure_cfg(GPIO_BANK_Z, pin, secure_state); in set_gpio_secure_configuration()
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| D | stm32mp1_private.c | 240 uint32_t pin; member
246 .pin = 3U,
250 .pin = 12U,
254 .pin = 2U,
258 .pin = 5U,
262 .pin = 7U,
266 .pin = 6U,
270 .pin = 0U,
279 set_gpio_reset_cfg(gpio_list[i].bank, gpio_list[i].pin); in stm32mp1_deconfigure_uart_pins()
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| /trusted-firmware-a-3.7.0/drivers/brcm/ |
| D | iproc_gpio.c | 33 #define GPIO_BANK(pin) ((pin) / NGPIOS_PER_BANK) argument
35 #define IPROC_GPIO_REG(pin, reg) (GPIO_BANK(pin) * GPIO_BANK_SIZE + (reg)) argument
36 #define IPROC_GPIO_SHIFT(pin) ((pin) % NGPIOS_PER_BANK) argument
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| /trusted-firmware-a-3.7.0/plat/rockchip/rk3399/drivers/gpio/ |
| D | rk3399_gpio.c | 54 #define GET_GPIO_PORT(pin) (pin / 32) argument
55 #define GET_GPIO_NUM(pin) (pin % 32) argument
56 #define GET_GPIO_BANK(pin) ((pin % 32) / 8) argument
57 #define GET_GPIO_ID(pin) ((pin % 32) % 8) argument
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| /trusted-firmware-a-3.7.0/include/drivers/st/ |
| D | stm32_gpio.h | 59 void set_gpio_secure_cfg(uint32_t bank, uint32_t pin, bool secure);
60 void set_gpio_reset_cfg(uint32_t bank, uint32_t pin);
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| /trusted-firmware-a-3.7.0/plat/allwinner/common/include/ |
| D | sunxi_private.h | 49 void sunxi_set_gpio_out(char port, int pin, bool level_high);
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| /trusted-firmware-a-3.7.0/docs/plat/st/ |
| D | stm32mp1.rst | 19 The STM32MP13 series is available in 3 different lines which are pin-to-pin compatible:
34 The STM32MP15 series is available in 3 different lines which are pin-to-pin compatible:
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| D | stm32mp2.rst | 13 The STM32MP25 series is available in 4 different lines which are pin-to-pin compatible:
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| /trusted-firmware-a-3.7.0/plat/xilinx/zynqmp/pm_service/ |
| D | pm_api_pinctrl.c | 2086 enum pm_ret_status pm_api_pinctrl_get_pin_groups(uint32_t pin, in pm_api_pinctrl_get_pin_groups() argument
2093 if (pin >= MAX_PIN) { in pm_api_pinctrl_get_pin_groups()
2099 grps = *zynqmp_pin_groups[pin].groups; in pm_api_pinctrl_get_pin_groups()
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| D | pm_api_pinctrl.h | 716 enum pm_ret_status pm_api_pinctrl_get_pin_groups(uint32_t pin,
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| /trusted-firmware-a-3.7.0/docs/plat/marvell/armada/ |
| D | porting.rst | 76 Press reset and keep pressing the button connected to the chosen GPIO pin. A
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| /trusted-firmware-a-3.7.0/docs/ |
| D | change-log.md | 2632 …- change pin-controller to pinctrl ([44fea93](https://review.trustedfirmware.org/plugins/gitiles/T…
3695 …- add a function to reset a pin ([737ad29](https://review.trustedfirmware.org/plugins/gitiles/TF-A…
6394 EEMI, PLL related PM, clock related PM, pin control related PM, reset
6506 instance, update for FMC2 pin muxing, and reduce MAX_XLAT_TABLES to 4
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