Home
last modified time | relevance | path

Searched refs:image_base (Results 1 – 25 of 65) sorted by relevance

123

/trusted-firmware-a-3.7.0/plat/nxp/common/img_loadr/
Dload_img.c31 int load_img(unsigned int image_id, uintptr_t *image_base, in load_img() argument
41 .image_info.image_base = *image_base - CSF_HDR_SZ, in load_img()
44 .image_info.image_base = *image_base, in load_img()
52 err = mmap_add_dynamic_region(img_info.image_info.image_base, in load_img()
53 img_info.image_info.image_base, in load_img()
71 *image_base = img_info.image_info.image_base + CSF_HDR_SZ; in load_img()
74 mmap_remove_dynamic_region(img_info.image_info.image_base, in load_img()
78 *image_base = img_info.image_info.image_base; in load_img()
/trusted-firmware-a-3.7.0/common/
Dimage_decompress.c37 info->image_base = decompressor_buf_base; in image_decompress_prepare()
43 uintptr_t compressed_image_base, image_base, work_base; in image_decompress() local
52 compressed_image_base = info->image_base; in image_decompress()
57 image_base = info->image_base; in image_decompress()
67 &image_base, info->image_max_size, in image_decompress()
75 info->image_size = image_base - info->image_base; in image_decompress()
77 flush_dcache_range(info->image_base, info->image_size); in image_decompress()
Dbl_common.c75 uintptr_t image_base; in load_image() local
83 image_base = image_data->image_base; in load_image()
101 INFO("Loading image id=%u at address 0x%lx\n", image_id, image_base); in load_image()
126 io_result = io_read(image_handle, image_base, image_size, &bytes_read); in load_image()
132 INFO("Image id=%u loaded: 0x%lx - 0x%lx\n", image_id, image_base, in load_image()
133 (uintptr_t)(image_base + image_size)); in load_image()
175 (void *)image_data->image_base, in load_auth_image_recursive()
179 zero_normalmem((void *)image_data->image_base, in load_auth_image_recursive()
181 flush_dcache_range(image_data->image_base, in load_auth_image_recursive()
241 flush_dcache_range(image_data->image_base, in load_auth_image()
/trusted-firmware-a-3.7.0/plat/arm/common/
Darm_dyn_cfg.c132 uintptr_t image_base; in arm_bl2_dyn_cfg_init() local
161 image_base = dtb_info->config_addr; in arm_bl2_dyn_cfg_init()
171 if (check_uptr_overflow(image_base, image_size)) { in arm_bl2_dyn_cfg_init()
181 if ((image_base >= BL31_BASE) && in arm_bl2_dyn_cfg_init()
182 (image_base <= BL31_LIMIT)) { in arm_bl2_dyn_cfg_init()
192 if (image_base < ARM_BL_RAM_BASE) { in arm_bl2_dyn_cfg_init()
205 if ((image_base >= BL32_BASE) && in arm_bl2_dyn_cfg_init()
206 (image_base <= BL32_LIMIT)) { in arm_bl2_dyn_cfg_init()
217 cfg_mem_params->image_info.image_base = image_base; in arm_bl2_dyn_cfg_init()
/trusted-firmware-a-3.7.0/lib/optee/
Doptee_utils.c57 init_load_addr = image_info->image_base; in parse_optee_image()
61 if (check_uptr_overflow(image_info->image_base, in parse_optee_image()
64 free_end = image_info->image_base + (image_info->image_max_size - 1); in parse_optee_image()
74 if (!((init_load_addr >= image_info->image_base) && in parse_optee_image()
79 (void *)image_info->image_base, in parse_optee_image()
80 (void *)(image_info->image_base + in parse_optee_image()
94 image_info->image_base = init_load_addr; in parse_optee_image()
186 header_ep->pc = pager_image_info->image_base; in parse_optee_header()
194 header_ep->args.arg1 = paged_image_info->image_base; in parse_optee_header()
/trusted-firmware-a-3.7.0/plat/nxp/common/setup/aarch64/
Dls_bl2_mem_params_desc.c42 .image_info.image_base = BL31_BASE - CSF_HDR_SZ,
46 .image_info.image_base = BL31_BASE,
68 .image_info.image_base = BL32_BASE - CSF_HDR_SZ,
72 .image_info.image_base = BL32_BASE,
89 .image_info.image_base = BL33_BASE - CSF_HDR_SZ,
93 .image_info.image_base = BL33_BASE,
/trusted-firmware-a-3.7.0/plat/hisilicon/hikey960/
Dhikey960_bl2_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
76 .image_info.image_base = BL31_BASE,
97 .image_info.image_base = BL32_BASE,
116 .image_info.image_base = BL32_BASE,
136 .image_info.image_base = HIKEY960_OPTEE_PAGEABLE_LOAD_BASE,
150 .image_info.image_base = DDR_SEC_CONFIG_BASE,
174 .image_info.image_base = NS_BL1U_BASE,
/trusted-firmware-a-3.7.0/plat/socionext/uniphier/
Duniphier_image_desc.c28 .image_info.image_base = UNIPHIER_SCP_OFFSET,
42 .image_info.image_base = UNIPHIER_BL31_OFFSET,
64 .image_info.image_base = UNIPHIER_BL32_OFFSET,
82 .image_info.image_base = UNIPHIER_BL33_OFFSET,
107 uniphier_image_descs[i].image_info.image_base += mem_base; in REGISTER_BL_IMAGE_DESCS()
/trusted-firmware-a-3.7.0/plat/rpi/rpi3/aarch64/
Drpi3_bl2_mem_params_desc.c39 .image_info.image_base = BL31_BASE,
61 .image_info.image_base = BL32_BASE,
82 .image_info.image_base = BL32_BASE,
104 .image_info.image_base = RPI3_OPTEE_PAGEABLE_LOAD_BASE,
128 .image_info.image_base = PLAT_RPI3_NS_IMAGE_OFFSET,
/trusted-firmware-a-3.7.0/plat/marvell/armada/common/aarch64/
Dmarvell_bl2_mem_params_desc.c33 .image_info.image_base = SCP_BL2_BASE,
77 .image_info.image_base = BL31_BASE,
98 .image_info.image_base = BL32_BASE,
117 .image_info.image_base = BL32_BASE,
137 .image_info.image_base = MARVELL_OPTEE_PAGEABLE_LOAD_BASE,
159 .image_info.image_base = MARVELL_DRAM_BASE,
/trusted-firmware-a-3.7.0/plat/hisilicon/poplar/
Dbl2_plat_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
76 .image_info.image_base = BL31_BASE,
97 .image_info.image_base = BL32_BASE,
116 .image_info.image_base = BL32_BASE,
136 .image_info.image_base = POPLAR_OPTEE_PAGEABLE_LOAD_BASE,
158 .image_info.image_base = PLAT_POPLAR_NS_IMAGE_OFFSET,
/trusted-firmware-a-3.7.0/plat/hisilicon/hikey/
Dhikey_bl2_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
76 .image_info.image_base = BL31_BASE,
97 .image_info.image_base = BL32_BASE,
116 .image_info.image_base = BL32_BASE,
136 .image_info.image_base = HIKEY_OPTEE_PAGEABLE_LOAD_BASE,
158 .image_info.image_base = HIKEY_NS_IMAGE_OFFSET,
/trusted-firmware-a-3.7.0/plat/arm/common/aarch64/
Darm_bl2_mem_params_desc.c31 .image_info.image_base = SCP_BL2_BASE,
75 .image_info.image_base = BL31_BASE,
115 .image_info.image_base = RMM_BASE,
132 .image_info.image_base = BL32_BASE,
155 .image_info.image_base = BL32_BASE,
175 .image_info.image_base = ARM_OPTEE_PAGEABLE_LOAD_BASE,
207 .image_info.image_base = PLAT_ARM_NS_IMAGE_BASE,
231 .image_info.image_base = ETHOSN_NPU_FW_IMAGE_BASE,
/trusted-firmware-a-3.7.0/plat/arm/board/corstone1000/common/
Dcorstone1000_bl2_mem_params_desc.c34 .image_info.image_base = BL31_BASE,
50 .image_info.image_base = BL32_BASE,
59 .image_info.image_base = CORSTONE1000_TOS_FW_CONFIG_BASE,
78 .image_info.image_base = BL33_BASE,
/trusted-firmware-a-3.7.0/plat/qemu/common/
Dqemu_bl2_mem_params_desc.c65 .image_info.image_base = BL31_BASE,
95 .image_info.image_base = BL32_BASE,
113 .image_info.image_base = BL32_BASE,
132 .image_info.image_base = QEMU_OPTEE_PAGEABLE_LOAD_BASE,
146 .image_info.image_base = TOS_FW_CONFIG_BASE,
160 .image_info.image_base = TB_FW_CONFIG_BASE,
195 .image_info.image_base = NS_IMAGE_OFFSET,
/trusted-firmware-a-3.7.0/plat/brcm/common/
Dbrcm_bl2_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
55 .image_info.image_base = BL31_BASE,
76 .image_info.image_base = BL32_BASE,
98 .image_info.image_base = PLAT_BRCM_NS_IMAGE_OFFSET,
/trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mp/
Dimx8mp_bl2_mem_params_desc.c23 .image_info.image_base = BL31_BASE,
38 .image_info.image_base = BL32_BASE,
52 .image_info.image_base = BL32_BASE,
86 .image_info.image_base = PLAT_NS_IMAGE_OFFSET,
/trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mm/
Dimx8mm_bl2_mem_params_desc.c23 .image_info.image_base = BL31_BASE,
38 .image_info.image_base = BL32_BASE,
52 .image_info.image_base = BL32_BASE,
86 .image_info.image_base = PLAT_NS_IMAGE_OFFSET,
/trusted-firmware-a-3.7.0/bl1/tbbr/
Dtbbr_img_desc.c17 .image_info.image_base = BL2_BASE,
35 .image_info.image_base = SCP_BL2U_BASE,
46 .image_info.image_base = BL2U_BASE,
/trusted-firmware-a-3.7.0/plat/imx/imx7/common/
Dimx7_bl2_mem_params_desc.c25 .image_info.image_base = IMX7_OPTEE_BASE,
39 .image_info.image_base = IMX7_OPTEE_BASE,
73 .image_info.image_base = IMX7_UBOOT_BASE,
/trusted-firmware-a-3.7.0/plat/socionext/synquacer/
Dsq_image_desc.c20 .image_info.image_base = BL31_BASE,
37 .image_info.image_base = BL32_BASE,
54 .image_info.image_base = PLAT_SQ_BL33_BASE,
/trusted-firmware-a-3.7.0/plat/intel/soc/common/
Dbl2_plat_mem_params_desc.c32 .image_info.image_base = SCP_BL2_BASE,
73 .image_info.image_base = BL31_BASE,
88 .image_info.image_base = PLAT_NS_IMAGE_OFFSET,
/trusted-firmware-a-3.7.0/plat/arm/common/aarch32/
Darm_bl2_mem_params_desc.c31 .image_info.image_base = SCP_BL2_BASE,
51 .image_info.image_base = BL32_BASE,
82 .image_info.image_base = PLAT_ARM_NS_IMAGE_BASE,
/trusted-firmware-a-3.7.0/plat/arm/board/fvp/
Dfvp_common_measured_boot.c25 err = event_log_measure_and_record(image_data->image_base, in plat_mboot_measure_image()
37 image_data->image_base, in plat_mboot_measure_image()
/trusted-firmware-a-3.7.0/plat/renesas/common/
Dbl2_plat_mem_params_desc.c40 .image_info.image_base = BL31_BASE,
61 .image_info.image_base = BL32_BASE,
82 .image_info.image_base = BL33_BASE,

123