Searched refs:clk_div (Results 1 – 10 of 10) sorted by relevance
27 (timer_ops->clk_div != 0U) && in udelay()33 assert(usec < (UINT64_MAX / timer_ops->clk_div)); in udelay()39 div_round_up((uint64_t)usec * timer_ops->clk_div, in udelay()78 (ops_ptr->clk_div != 0U) && in timer_init()
36 ops.clk_div = div; in generic_delay_timer_init_args()
18 #define sp804_timer_init(base_addr, clk_mult, clk_div) \ argument23 (clk_div) \
24 static struct clk_div_factors clk_div[] = { variable94 clk_div[clk_idx].fcr_div; in console_imx_uart_core_init()116 val = ((uart_clk / clk_div[clk_idx].bmr_div) / baud_rate) - 1; in console_imx_uart_core_init()
28 .clk_div = SYS_COUNTER_FREQ_IN_MHZ
44 plat_timer_ops.clk_div = PLAT_SYS_COUNTER_FREQ_IN_MHZ; in socfpga_delay_timer_init_args()
55 tegra_timer_ops.clk_div = divider; in tegra_delay_timer_init()
27 uint32_t clk_div; member
38 .clk_div = SYS_COUNTER_FREQ_IN_MHZ,
64 ops.clk_div = div; in delay_timer_init_args()
