Searched refs:WDOG3_BASE (Results 1 – 4 of 4) sorted by relevance
205 mmio_write_32(WDOG3_BASE + WDOG_CNT, 0xd928c520); in imx_system_reset()206 while ((mmio_read_32(WDOG3_BASE + WDOG_CS) & WDOG_CS_ULK) == 0U) { in imx_system_reset()210 mmio_write_32(WDOG3_BASE + WDOG_TOVAL, 0x10); in imx_system_reset()211 mmio_write_32(WDOG3_BASE + WDOG_CS, 0x21e3); in imx_system_reset()
23 imx_wdog_power_down(WDOG3_BASE); in imx_wdog_init()
102 #define WDOG3_BASE (AIPS1_BASE + 0x2A0000) macro
69 #define WDOG3_BASE U(0x42490000) macro