Searched refs:TEGRA_XUSB_PADCTL_BASE (Results 1 – 3 of 3) sorted by relevance
105 MAP_REGION_FLAT(TEGRA_XUSB_PADCTL_BASE, 0x2000U, /* 8KB */295 mmio_write_32(TEGRA_XUSB_PADCTL_BASE + in plat_early_platform_setup()297 assert(mmio_read_32(TEGRA_XUSB_PADCTL_BASE + in plat_early_platform_setup()299 mmio_write_32(TEGRA_XUSB_PADCTL_BASE + in plat_early_platform_setup()301 assert(mmio_read_32(TEGRA_XUSB_PADCTL_BASE + in plat_early_platform_setup()303 mmio_write_32(TEGRA_XUSB_PADCTL_BASE + in plat_early_platform_setup()305 assert(mmio_read_32(TEGRA_XUSB_PADCTL_BASE + in plat_early_platform_setup()307 mmio_write_32(TEGRA_XUSB_PADCTL_BASE + in plat_early_platform_setup()309 assert(mmio_read_32(TEGRA_XUSB_PADCTL_BASE + in plat_early_platform_setup()311 mmio_write_32(TEGRA_XUSB_PADCTL_BASE + in plat_early_platform_setup()[all …]
419 mmio_write_32(TEGRA_XUSB_PADCTL_BASE + in tegra_soc_pwr_domain_on_finish()421 assert(mmio_read_32(TEGRA_XUSB_PADCTL_BASE + in tegra_soc_pwr_domain_on_finish()423 mmio_write_32(TEGRA_XUSB_PADCTL_BASE + in tegra_soc_pwr_domain_on_finish()425 assert(mmio_read_32(TEGRA_XUSB_PADCTL_BASE + in tegra_soc_pwr_domain_on_finish()427 mmio_write_32(TEGRA_XUSB_PADCTL_BASE + in tegra_soc_pwr_domain_on_finish()429 assert(mmio_read_32(TEGRA_XUSB_PADCTL_BASE + in tegra_soc_pwr_domain_on_finish()431 mmio_write_32(TEGRA_XUSB_PADCTL_BASE + in tegra_soc_pwr_domain_on_finish()433 assert(mmio_read_32(TEGRA_XUSB_PADCTL_BASE + in tegra_soc_pwr_domain_on_finish()435 mmio_write_32(TEGRA_XUSB_PADCTL_BASE + in tegra_soc_pwr_domain_on_finish()437 assert(mmio_read_32(TEGRA_XUSB_PADCTL_BASE + in tegra_soc_pwr_domain_on_finish()[all …]
156 #define TEGRA_XUSB_PADCTL_BASE U(0x03520000) macro
