Searched refs:RPC_U32 (Results 1 – 6 of 6) sorted by relevance
| /trusted-firmware-a-3.7.0/plat/imx/common/sci/svc/misc/ |
| D | misc_rpc_clnt.c | 40 RPC_U32(&msg, 0U) = (uint32_t)ctrl; in sc_misc_set_control()
41 RPC_U32(&msg, 4U) = (uint32_t)val; in sc_misc_set_control()
60 RPC_U32(&msg, 0U) = (uint32_t)ctrl; in sc_misc_get_control()
67 *val = RPC_U32(&msg, 0U); in sc_misc_get_control()
121 RPC_U32(&msg, 0U) = (uint32_t)(addr_src >> 32U); in sc_misc_seco_image_load()
122 RPC_U32(&msg, 4U) = (uint32_t)addr_src; in sc_misc_seco_image_load()
123 RPC_U32(&msg, 8U) = (uint32_t)(addr_dst >> 32U); in sc_misc_seco_image_load()
124 RPC_U32(&msg, 12U) = (uint32_t)addr_dst; in sc_misc_seco_image_load()
125 RPC_U32(&msg, 16U) = (uint32_t)len; in sc_misc_seco_image_load()
144 RPC_U32(&msg, 0U) = (uint32_t)(addr >> 32U); in sc_misc_seco_authenticate()
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| /trusted-firmware-a-3.7.0/plat/imx/common/sci/svc/timer/ |
| D | timer_rpc_clnt.c | 39 RPC_U32(&msg, 0U) = (uint32_t)timeout; in sc_timer_set_wdog_timeout()
57 RPC_U32(&msg, 0U) = (uint32_t)pre_timeout; in sc_timer_set_wdog_pre_timeout()
131 *timeout = RPC_U32(&msg, 0U); in sc_timer_get_wdog_status()
134 *max_timeout = RPC_U32(&msg, 4U); in sc_timer_get_wdog_status()
137 *remaining_time = RPC_U32(&msg, 8U); in sc_timer_get_wdog_status()
160 *timeout = RPC_U32(&msg, 0U); in sc_timer_pt_get_wdog_status()
163 *remaining_time = RPC_U32(&msg, 4U); in sc_timer_pt_get_wdog_status()
264 *sec = RPC_U32(&msg, 0U); in sc_timer_get_rtc_sec1970()
302 RPC_U32(&msg, 0U) = (uint32_t)sec; in sc_timer_set_rtc_periodic_alarm()
352 RPC_U32(&msg, 0U) = (uint32_t)(ticks >> 32U); in sc_timer_set_sysctr_alarm()
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| /trusted-firmware-a-3.7.0/plat/imx/common/sci/svc/rm/ |
| D | rm_rpc_clnt.c | 402 RPC_U32(&msg, 0U) = (uint32_t)(addr_start >> 32U); in sc_rm_memreg_alloc()
403 RPC_U32(&msg, 4U) = (uint32_t)addr_start; in sc_rm_memreg_alloc()
404 RPC_U32(&msg, 8U) = (uint32_t)(addr_end >> 32U); in sc_rm_memreg_alloc()
405 RPC_U32(&msg, 12U) = (uint32_t)addr_end; in sc_rm_memreg_alloc()
428 RPC_U32(&msg, 0U) = (uint32_t)(addr_start >> 32U); in sc_rm_memreg_split()
429 RPC_U32(&msg, 4U) = (uint32_t)addr_start; in sc_rm_memreg_split()
430 RPC_U32(&msg, 8U) = (uint32_t)(addr_end >> 32U); in sc_rm_memreg_split()
431 RPC_U32(&msg, 12U) = (uint32_t)addr_end; in sc_rm_memreg_split()
471 RPC_U32(&msg, 0U) = (uint32_t)(addr_start >> 32U); in sc_rm_find_memreg()
472 RPC_U32(&msg, 4U) = (uint32_t)addr_start; in sc_rm_find_memreg()
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| /trusted-firmware-a-3.7.0/plat/imx/common/sci/svc/pm/ |
| D | pm_rpc_clnt.c | 180 RPC_U32(&msg, 0U) = (uint32_t)(address >> 32U); in sc_pm_set_cpu_resume_addr()
181 RPC_U32(&msg, 4U) = (uint32_t)address; in sc_pm_set_cpu_resume_addr()
200 RPC_U32(&msg, 0U) = (uint32_t)(address >> 32U); in sc_pm_set_cpu_resume()
201 RPC_U32(&msg, 4U) = (uint32_t)address; in sc_pm_set_cpu_resume()
244 RPC_U32(&msg, 0U) = *(uint32_t *)rate; in sc_pm_set_clock_rate()
251 *rate = RPC_U32(&msg, 0U); in sc_pm_set_clock_rate()
272 *rate = RPC_U32(&msg, 0U); in sc_pm_get_clock_rate()
390 RPC_U32(&msg, 0U) = (uint32_t)(boot_addr >> 32U); in sc_pm_boot()
391 RPC_U32(&msg, 4U) = (uint32_t)boot_addr; in sc_pm_boot()
445 RPC_U32(&msg, 0U) = (uint32_t)(address >> 32U); in sc_pm_cpu_start()
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| /trusted-firmware-a-3.7.0/plat/imx/common/sci/svc/pad/ |
| D | pad_rpc_clnt.c | 91 RPC_U32(&msg, 0U) = (uint32_t)ctrl; in sc_pad_set_gp()
115 *ctrl = RPC_U32(&msg, 0U); in sc_pad_get_gp()
171 RPC_U32(&msg, 0U) = (uint32_t)ctrl; in sc_pad_set_all()
201 *ctrl = RPC_U32(&msg, 0U); in sc_pad_get_all()
232 RPC_U32(&msg, 0U) = (uint32_t)val; in sc_pad_set()
256 *val = RPC_U32(&msg, 0U); in sc_pad_get()
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| /trusted-firmware-a-3.7.0/plat/imx/common/include/sci/ |
| D | sci_rpc.h | 35 #define RPC_U32(MSG, IDX) ((MSG)->DATA.u32[(IDX) / 4U]) macro
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