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Searched refs:PLAT_ARM_CLUSTER_COUNT (Results 1 – 25 of 31) sorted by relevance

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/trusted-firmware-a-3.7.0/plat/arm/board/corstone1000/common/
Dcorstone1000_topology.c11 static unsigned char corstone1000_power_domain_tree_desc[PLAT_ARM_CLUSTER_COUNT
26 corstone1000_power_domain_tree_desc[1] = PLAT_ARM_CLUSTER_COUNT; in plat_get_power_domain_tree_desc()
28 for (i = 0; i < PLAT_ARM_CLUSTER_COUNT; i++) in plat_get_power_domain_tree_desc()
/trusted-firmware-a-3.7.0/plat/arm/board/corstone700/common/
Dcorstone700_topology.c11 static unsigned char corstone700_power_domain_tree_desc[PLAT_ARM_CLUSTER_COUNT
26 corstone700_power_domain_tree_desc[1] = PLAT_ARM_CLUSTER_COUNT; in plat_get_power_domain_tree_desc()
28 for (i = 0; i < PLAT_ARM_CLUSTER_COUNT; i++) in plat_get_power_domain_tree_desc()
/trusted-firmware-a-3.7.0/plat/arm/board/rdn2/
Drdn2_topology.c14 (PLAT_ARM_CLUSTER_COUNT) * (CSS_SGI_CHIP_COUNT),
19 #if (PLAT_ARM_CLUSTER_COUNT > 4 || \
26 #if (PLAT_ARM_CLUSTER_COUNT > 8 || \
33 #if (PLAT_ARM_CLUSTER_COUNT > 8 || \
89 #if (PLAT_ARM_CLUSTER_COUNT > 8)
/trusted-firmware-a-3.7.0/plat/arm/board/n1sdp/
Dn1sdp_topology.c23 PLAT_ARM_CLUSTER_COUNT,
24 PLAT_ARM_CLUSTER_COUNT,
/trusted-firmware-a-3.7.0/plat/arm/board/rdn2/include/
Dplatform_def.h15 #define PLAT_ARM_CLUSTER_COUNT U(8) macro
17 #define PLAT_ARM_CLUSTER_COUNT U(4) macro
19 #define PLAT_ARM_CLUSTER_COUNT U(16) macro
/trusted-firmware-a-3.7.0/plat/arm/board/sgi575/
Dsgi575_topology.c13 PLAT_ARM_CLUSTER_COUNT,
/trusted-firmware-a-3.7.0/plat/arm/board/rde1edge/
Drde1edge_topology.c16 PLAT_ARM_CLUSTER_COUNT,
/trusted-firmware-a-3.7.0/plat/arm/board/morello/
Dmorello_topology.c27 PLAT_ARM_CLUSTER_COUNT,
/trusted-firmware-a-3.7.0/plat/arm/board/tc/
Dtc_topology.c14 PLAT_ARM_CLUSTER_COUNT,
/trusted-firmware-a-3.7.0/plat/arm/board/rde1edge/include/
Dplatform_def.h15 #define PLAT_ARM_CLUSTER_COUNT U(2) macro
/trusted-firmware-a-3.7.0/plat/arm/board/sgi575/include/
Dplatform_def.h15 #define PLAT_ARM_CLUSTER_COUNT U(2) macro
/trusted-firmware-a-3.7.0/plat/arm/common/
Darm_ccn.c23 CASSERT(PLAT_ARM_CLUSTER_COUNT == ARRAY_SIZE(master_to_rn_id_map),
Darm_topology.c44 if (cluster_id >= PLAT_ARM_CLUSTER_COUNT) in arm_check_mpidr()
/trusted-firmware-a-3.7.0/plat/arm/board/rdn1edge/include/
Dplatform_def.h15 #define PLAT_ARM_CLUSTER_COUNT U(2) macro
/trusted-firmware-a-3.7.0/plat/arm/board/rdn1edge/
Drdn1edge_topology.c14 (PLAT_ARM_CLUSTER_COUNT) * (CSS_SGI_CHIP_COUNT),
/trusted-firmware-a-3.7.0/plat/arm/board/rdv1/
Drdv1_topology.c14 PLAT_ARM_CLUSTER_COUNT,
/trusted-firmware-a-3.7.0/plat/arm/board/rdv1mc/
Drdv1mc_topology.c16 ((PLAT_ARM_CLUSTER_COUNT) * (CSS_SGI_CHIP_COUNT)),
/trusted-firmware-a-3.7.0/plat/arm/board/rdv1/include/
Dplatform_def.h14 #define PLAT_ARM_CLUSTER_COUNT U(16) macro
/trusted-firmware-a-3.7.0/plat/arm/board/rdv1mc/include/
Dplatform_def.h13 #define PLAT_ARM_CLUSTER_COUNT U(4) macro
/trusted-firmware-a-3.7.0/plat/arm/board/corstone700/common/include/
Dplatform_def.h34 #define PLAT_ARM_CLUSTER_COUNT CORSTONE700_CLUSTER_COUNT macro
36 #define PLATFORM_CORE_COUNT (PLAT_ARM_CLUSTER_COUNT * \
/trusted-firmware-a-3.7.0/plat/arm/board/morello/include/
Dplatform_def.h102 #define PLAT_ARM_CLUSTER_COUNT U(2) macro
108 PLAT_ARM_CLUSTER_COUNT * \
/trusted-firmware-a-3.7.0/plat/arm/board/n1sdp/include/
Dplatform_def.h129 #define PLAT_ARM_CLUSTER_COUNT U(2) macro
135 PLAT_ARM_CLUSTER_COUNT * \
/trusted-firmware-a-3.7.0/plat/arm/board/fvp/fconf/
Dfconf_hw_config_getter.c137 uint32_t cpus_per_cluster[PLAT_ARM_CLUSTER_COUNT] = {0}; in fconf_populate_topology()
141 assert(cluster_count < PLAT_ARM_CLUSTER_COUNT); in fconf_populate_topology()
/trusted-firmware-a-3.7.0/plat/arm/css/sgi/aarch64/
Dsgi_helper.S52 mov x4, #PLAT_ARM_CLUSTER_COUNT
/trusted-firmware-a-3.7.0/plat/arm/board/corstone1000/common/include/
Dplatform_def.h43 #define PLAT_ARM_CLUSTER_COUNT CORSTONE1000_CLUSTER_COUNT macro
45 #define PLATFORM_CORE_COUNT (PLAT_ARM_CLUSTER_COUNT * \

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