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Searched refs:IMX_CSU_BASE (Results 1 – 11 of 11) sorted by relevance

/trusted-firmware-a-3.7.0/plat/imx/imx8m/include/
Dimx8m_csu.h26 #define CSLx_REG(x) (IMX_CSU_BASE + ((x) / 2) * 4)
30 #define CSU_HP_REG(x) (IMX_CSU_BASE + ((x) / 16) * 4 + 0x200)
34 #define CSU_SA_REG(x) (IMX_CSU_BASE + 0x218)
38 #define CSU_HPCONTROL_REG(x) (IMX_CSU_BASE + (((x) / 16) * 4) + 0x358)
/trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mp/
Dimx8mp_bl2_el3_setup.c51 mmio_write_32(IMX_CSU_BASE + i * 4, 0x00ff00ff); in bl2_el3_early_platform_setup()
Dimx8mp_bl31_setup.c129 mmio_write_32(IMX_CSU_BASE + i * 4, 0x00ff00ff); in bl31_early_platform_setup2()
/trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mm/
Dimx8mm_bl2_el3_setup.c74 mmio_write_32(IMX_CSU_BASE + i * 4, CSU_CSL_OPEN_ACCESS); in bl2_el3_early_platform_setup()
Dimx8mm_bl31_setup.c141 mmio_write_32(IMX_CSU_BASE + i * 4, 0x00ff00ff); in bl31_early_platform_setup2()
/trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mq/include/
Dplatform_def.h76 #define IMX_CSU_BASE U(0x303e0000) macro
/trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mm/include/
Dplatform_def.h102 #define IMX_CSU_BASE U(0x303e0000) macro
/trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mn/include/
Dplatform_def.h85 #define IMX_CSU_BASE U(0x303e0000) macro
/trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mn/
Dimx8mn_bl31_setup.c133 mmio_write_32(IMX_CSU_BASE + i * 4, 0x00ff00ff); in bl31_early_platform_setup2()
/trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mq/
Dimx8mq_bl31_setup.c152 mmio_write_32(IMX_CSU_BASE + i * 4, 0xffffffff); in bl31_early_platform_setup2()
/trusted-firmware-a-3.7.0/plat/imx/imx8m/imx8mp/include/
Dplatform_def.h104 #define IMX_CSU_BASE U(0x303e0000) macro