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Searched refs:GICR_ISENABLER0 (Results 1 – 4 of 4) sorted by relevance

/trusted-firmware-a-3.7.0/plat/mediatek/mt8183/
Dplat_mt_gic.c119 gic_data.saved_enable = mmio_read_32(gicr_base + GICR_ISENABLER0); in mt_gic_rdistif_save()
136 mmio_write_32(gicr_base + GICR_ISENABLER0, gic_data.saved_enable); in mt_gic_rdistif_restore()
/trusted-firmware-a-3.7.0/plat/mediatek/drivers/gic600/
Dmt_gic_v3.c117 gic_data.saved_enable = mmio_read_32(gicr_base + GICR_ISENABLER0); in mt_gic_rdistif_save()
151 mmio_write_32(gicr_base + GICR_ISENABLER0, gic_data.saved_enable); in mt_gic_rdistif_restore()
177 mmio_write_32(gicr_base + GICR_ISENABLER0, gic_data.saved_enable); in mt_gic_rdistif_restore_all()
/trusted-firmware-a-3.7.0/include/drivers/arm/
Dgicv3.h171 #define GICR_ISENABLER0 (GICR_SGIBASE_OFFSET + U(0x100)) macro
184 #define GICR_ISENABLER GICR_ISENABLER0
/trusted-firmware-a-3.7.0/drivers/arm/gic/v3/
Dgicv3_private.h560 return mmio_read_32(base + GICR_ISENABLER0); in gicr_read_isenabler0()
565 mmio_write_32(base + GICR_ISENABLER0, val); in gicr_write_isenabler0()