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Searched refs:DRVCTRL0_MASK (Results 1 – 8 of 8) sorted by relevance

/trusted-firmware-a-3.7.0/drivers/renesas/rcar/pfc/M3N/
Dpfc_init_m3n.c210 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro
915 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_m3n()
/trusted-firmware-a-3.7.0/drivers/renesas/rzg/pfc/G2H/
Dpfc_init_g2h.c210 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro
959 reg = (reg & DRVCTRL0_MASK) | in pfc_init_g2h()
/trusted-firmware-a-3.7.0/drivers/renesas/rzg/pfc/G2N/
Dpfc_init_g2n.c210 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro
955 reg = (reg & DRVCTRL0_MASK) | in pfc_init_g2n()
/trusted-firmware-a-3.7.0/drivers/renesas/rcar/pfc/H3/
Dpfc_init_h3_v1.c206 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro
880 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_h3_v1()
Dpfc_init_h3_v2.c208 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro
913 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_h3_v2()
/trusted-firmware-a-3.7.0/drivers/renesas/rzg/pfc/G2M/
Dpfc_init_g2m.c211 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro
997 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_g2m()
/trusted-firmware-a-3.7.0/drivers/renesas/rcar/pfc/M3/
Dpfc_init_m3.c211 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro
1008 reg = ((reg & DRVCTRL0_MASK) | DRVCTRL0_QSPI0_SPCLK(3) in pfc_init_m3()
/trusted-firmware-a-3.7.0/drivers/renesas/rcar/pfc/D3/
Dpfc_init_d3.c211 #define DRVCTRL0_MASK (0xCCCCCCCCU) macro