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Searched refs:CPU_DEC_CCI_BASE_REG (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-a-3.7.0/plat/marvell/armada/a3k/common/
Dplat_cci.c32 mmio_write_32(CPU_DEC_CCI_BASE_REG, MVEBU_CCI_BASE >> 20); in plat_marvell_interconnect_init()
/trusted-firmware-a-3.7.0/plat/marvell/armada/a3k/common/include/
Dplatform_def.h223 #define CPU_DEC_CCI_BASE_REG (MVEBU_CPU_DEC_WIN_REG_BASE + 0xe0) macro