Searched refs:CLK_DIVIDER_POWER_OF_TWO (Results 1 – 5 of 5) sorted by relevance
| /trusted-firmware-a-3.7.0/plat/xilinx/zynqmp/pm_service/ |
| D | pm_api_clock.h | 48 #define CLK_DIVIDER_POWER_OF_TWO BIT(1) macro
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| D | pm_api_clock.c | 2687 if (CLK_DIVIDER_POWER_OF_TWO & in pm_api_clock_get_max_divisor()
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| /trusted-firmware-a-3.7.0/drivers/st/clk/ |
| D | clk-stm32-core.h | 125 #define CLK_DIVIDER_POWER_OF_TWO BIT(1) macro
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| D | clk-stm32-core.c | 251 if ((flags & CLK_DIVIDER_POWER_OF_TWO) != 0UL) { in _get_div()
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| D | clk-stm32mp13.c | 868 DIV_CFG(DIV_HSI, RCC_HSICFGR, 0, 2, CLK_DIVIDER_POWER_OF_TWO, NULL, DIV_NO_BIT_RDY),
869 DIV_CFG(DIV_TRACE, RCC_DBGCFGR, 0, 3, CLK_DIVIDER_POWER_OF_TWO, NULL, DIV_NO_BIT_RDY),
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