| /trusted-firmware-a-3.6.0-3.5.0/plat/brcm/board/stingray/src/ |
| D | fsx.c | 182 unsigned int i, v, data; in fsx_init() local
198 v = mmio_read_32(fs4_idm_reset_control); in fsx_init()
199 v |= (1 << FS4_IDM_RESET_CONTROL__RESET); in fsx_init()
200 mmio_write_32(fs4_idm_reset_control, v); in fsx_init()
202 v = mmio_read_32(fs4_idm_reset_control); in fsx_init()
203 v &= ~(1 << FS4_IDM_RESET_CONTROL__RESET); in fsx_init()
204 mmio_write_32(fs4_idm_reset_control, v); in fsx_init()
210 v = mmio_read_32(FS6_SUB_TOP_BASE + FS6_PKI_DME_RESET); in fsx_init()
211 v &= ~(PKI_DME_RESET); in fsx_init()
212 mmio_write_32(FS6_SUB_TOP_BASE + FS6_PKI_DME_RESET, v); in fsx_init()
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/lib/extensions/spe/ |
| D | spe.c | 26 uint64_t v; in spe_enable() local
37 v = read_mdcr_el2(); in spe_enable()
38 v &= ~MDCR_EL2_TPMS; in spe_enable()
39 v |= MDCR_EL2_E2PB(MDCR_EL2_E2PB_EL1); in spe_enable()
40 write_mdcr_el2(v); in spe_enable()
53 v = read_mdcr_el3(); in spe_enable()
54 v |= MDCR_NSPB(MDCR_NSPB_EL1) | MDCR_EnPMSN_BIT; in spe_enable()
55 write_mdcr_el3(v); in spe_enable()
60 uint64_t v; in spe_disable() local
67 v = read_pmblimitr_el1(); in spe_disable()
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/include/drivers/nxp/dcfg/ |
| D | scfg.h | 48 #define scfg_out32(a, v) mmio_write_32((uintptr_t)(a), bswap32(v)) argument
49 #define scfg_setbits32(a, v) mmio_setbits_32((uintptr_t)(a), v) argument
50 #define scfg_clrbits32(a, v) mmio_clrbits_32((uintptr_t)(a), v) argument
55 #define scfg_out32(a, v) mmio_write_32((uintptr_t)(a), v) argument
56 #define scfg_setbits32(a, v) mmio_setbits_32((uintptr_t)(a), v) argument
57 #define scfg_clrbits32(a, v) mmio_clrbits_32((uintptr_t)(a), v) argument
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| D | dcfg.h | 21 #define gur_out32(a, v) mmio_write_32((uintptr_t)(a), bswap32(v)) argument
24 #define gur_out32(a, v) mmio_write_32((uintptr_t)(a), v) argument
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| /trusted-firmware-a-3.6.0-3.5.0/drivers/amlogic/crypto/ |
| D | sha_dma.c | 25 #define ASD_DESC_SET(x, v, msk, off) \ argument
26 ((x) = ((x) & ~((msk) << (off))) | (((v) & (msk)) << (off)))
32 #define ASD_DESC_LEN_SET(d, v) \ argument
33 (ASD_DESC_SET((d)->cfg, v, ASD_DESC_LEN_MASK, ASD_DESC_LEN_OFF))
39 #define ASD_DESC_IRQ_SET(d, v) \ argument
40 (ASD_DESC_SET((d)->cfg, v, ASD_DESC_IRQ_MASK, ASD_DESC_IRQ_OFF))
46 #define ASD_DESC_EOD_SET(d, v) \ argument
47 (ASD_DESC_SET((d)->cfg, v, ASD_DESC_EOD_MASK, ASD_DESC_EOD_OFF))
53 #define ASD_DESC_LOOP_SET(d, v) \ argument
54 (ASD_DESC_SET((d)->cfg, v, ASD_DESC_LOOP_MASK, ASD_DESC_LOOP_OFF))
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/include/drivers/nxp/ddr/ |
| D | ddr_io.h | 24 #define ddr_out32(a, v) mmio_write_32((uintptr_t)(a),\ argument
25 bswap32(v))
28 #define ddr_out32(a, v) mmio_write_32((uintptr_t)(a), v) argument
33 #define ddr_setbits32(a, v) ddr_out32((a), ddr_in32(a) | (v)) argument
34 #define ddr_clrbits32(a, v) ddr_out32((a), ddr_in32(a) & ~(v)) argument
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| /trusted-firmware-a-3.6.0-3.5.0/include/arch/aarch32/ |
| D | arch_helpers.h | 24 static inline void write_## _name(u_register_t v) \
26 __asm__ volatile ("mcr "#coproc","#opc1",%0,"#CRn","#CRm","#opc2 : : "r" (v));\
32 u_register_t v; \
33 __asm__ volatile ("mrc "#coproc","#opc1",%0,"#CRn","#CRm","#opc2 : "=r" (v));\
34 return v; \
43 static inline void write64_## _name(uint64_t v) \
45 __asm__ volatile ("mcrr "#coproc","#opc1", %Q0, %R0,"#CRm : : "r" (v));\
50 { uint64_t v; \
51 __asm__ volatile ("mrrc "#coproc","#opc1", %Q0, %R0,"#CRm : "=r" (v));\
52 return v; \
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/drivers/ptp3/ |
| D | ptp3_common.c | 61 unsigned long v = 0; in pdp_proc_arm_write() local
64 __asm__ volatile ("mrs %0, S3_6_C15_C2_0" : "=r" (v)); in pdp_proc_arm_write()
65 v |= (UL(0x0) << 52); in pdp_proc_arm_write()
66 v |= (UL(0x1) << 53); in pdp_proc_arm_write()
67 v |= (UL(0x0) << 54); in pdp_proc_arm_write()
68 v |= (UL(0x0) << 48); in pdp_proc_arm_write()
69 v |= (UL(0x1) << 49); in pdp_proc_arm_write()
70 __asm__ volatile ("msr S3_6_C15_C2_0, %0" : : "r" (v)); in pdp_proc_arm_write()
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| /trusted-firmware-a-3.6.0-3.5.0/include/drivers/nxp/qspi/ |
| D | qspi.h | 19 #define qspi_out32(a, v) mmio_write_32((uintptr_t)(a), bswap32(v)) argument
22 #define qspi_out32(a, v) mmio_write_32((uintptr_t)(a), (v)) argument
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| /trusted-firmware-a-3.6.0-3.5.0/include/drivers/nxp/gpio/ |
| D | nxp_gpio.h | 33 #define gpio_write32(a, v) mmio_write_32((uintptr_t)(a), bswap32(v)) argument
36 #define gpio_write32(a, v) mmio_write_32((uintptr_t)(a), (v)) argument
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| /trusted-firmware-a-3.6.0-3.5.0/include/lib/libc/aarch32/ |
| D | endian_.h | 92 __bswap32_var(uint32_t v) in __bswap32_var() argument
100 : "+r" (v), "=r" (t1)); in __bswap32_var()
102 return (v); in __bswap32_var()
106 __bswap16_var(uint16_t v) in __bswap16_var() argument
108 uint32_t ret = v & 0xffff; in __bswap16_var()
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| /trusted-firmware-a-3.6.0-3.5.0/include/drivers/nxp/crypto/caam/ |
| D | caam_io.h | 27 #define sec_out32(a, v) mmio_write_32((uintptr_t)(a), bswap32(v)) argument
36 #define sec_out32(a, v) mmio_write_32((uintptr_t)(a), (v)) argument
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| /trusted-firmware-a-3.6.0-3.5.0/include/drivers/nxp/sec_mon/ |
| D | snvs.h | 28 #define snvs_write32(a, v) mmio_write_32((uintptr_t)(a), bswap32((v))) argument
31 #define snvs_write32(a, v) mmio_write_32((uintptr_t)(a), (v)) argument
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| /trusted-firmware-a-3.6.0-3.5.0/include/lib/ |
| D | utils.h | 84 u_register_t v; \
85 __asm__ volatile ("ldr %0, =" #_name : "=r" (v) : "X" (#_name));\
86 return v; \
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| /trusted-firmware-a-3.6.0-3.5.0/include/lib/libc/aarch64/ |
| D | endian_.h | 80 __bswap32_var(uint32_t v) in __bswap32_var() argument
85 : "=&r" (ret), "+r" (v)); in __bswap32_var()
91 __bswap16_var(uint16_t v) in __bswap16_var() argument
96 : "=&r" (ret), "+r" (v)); in __bswap16_var()
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| /trusted-firmware-a-3.6.0-3.5.0/include/drivers/nxp/sfp/ |
| D | sfp.h | 92 #define sfp_write32(a, v) mmio_write_32((uintptr_t)(a), bswap32(v)) argument
95 #define sfp_write32(a, v) mmio_write_32((uintptr_t)(a), (v)) argument
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| /trusted-firmware-a-3.6.0-3.5.0/include/arch/aarch64/ |
| D | arch_helpers.h | 25 u_register_t v; \
26 __asm__ volatile ("mrs %0, " #_reg_name : "=r" (v)); \
27 return v; \
33 u_register_t v; \
34 __asm__ ("mrs %0, " #_reg_name : "=r" (v)); \
35 return v; \
39 static inline void write_ ## _name(u_register_t v) \
41 __asm__ volatile ("msr " #_reg_name ", %0" : : "r" (v)); \
44 #define SYSREG_WRITE_CONST(reg_name, v) \ argument
45 __asm__ volatile ("msr " #reg_name ", %0" : : "i" (v))
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/plat/rockchip/rk3399/drivers/m0/include/ |
| D | rk3399_mcu.h | 16 #define mmio_write_32(c, v) ((*(volatile unsigned int *)(c)) = (v)) argument
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| /trusted-firmware-a-3.6.0-3.5.0/include/drivers/nxp/i2c/ |
| D | i2c.h | 33 #define i2c_out(a, v) mmio_write_8((uintptr_t)(a), (v)) argument
|
| /trusted-firmware-a-3.6.0-3.5.0/drivers/renesas/common/emmc/ |
| D | emmc_std.h | 20 #define SETR_64(r, v) (*(volatile uint64_t *)(r) = (v)) argument
24 #define SETR_32(r, v) (*(volatile uint32_t *)(r) = (v)) argument
28 #define SETR_16(r, v) (*(volatile uint16_t *)(r) = (v)) argument
32 #define SETR_8(r, v) (*(volatile uint8_t *)(r) = (v)) argument
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| /trusted-firmware-a-3.6.0-3.5.0/docs/design/ |
| D | psci-pd-tree.rst | 105 v v v v v v v v v v v v v
272 CPU12 | 6 | v
294 +-------------+ v
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| /trusted-firmware-a-3.6.0-3.5.0/plat/amlogic/gxl/ |
| D | gxl_def.h | 97 #define AML_AO_RTI_SCP_IS_READY(v) \ argument
98 ((((v) >> AML_AO_RTI_SCP_READY_OFF) & \
|
| /trusted-firmware-a-3.6.0-3.5.0/plat/amlogic/axg/ |
| D | axg_def.h | 93 #define AML_AO_RTI_SCP_IS_READY(v) \ argument
94 ((((v) >> AML_AO_RTI_SCP_READY_OFF) & \
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| /trusted-firmware-a-3.6.0-3.5.0/plat/nxp/common/setup/include/ |
| D | plat_common.h | 146 #define SOC_ENTRY(n, v, ncl, nc) { \ argument
148 .version = SVR_##v, \
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| /trusted-firmware-a-3.6.0-3.5.0/plat/amlogic/g12a/ |
| D | g12a_def.h | 99 #define AML_AO_RTI_SCP_IS_READY(v) \ argument
100 ((((v) >> AML_AO_RTI_SCP_READY_OFF) & \
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