| /trusted-firmware-a-3.6.0-3.5.0/plat/socionext/synquacer/drivers/scpi/ |
| D | sq_scpi.c | 48 static void scpi_secure_message_receive(scpi_cmd_t *cmd) in scpi_secure_message_receive() argument
52 assert(cmd != NULL); in scpi_secure_message_receive()
70 memcpy(cmd, (void *) SCPI_SHARED_MEM_SCP_TO_AP, sizeof(*cmd)); in scpi_secure_message_receive()
119 scpi_cmd_t *cmd; in scpi_set_sq_power_state() local
132 cmd = SCPI_CMD_HEADER_AP_TO_SCP; in scpi_set_sq_power_state()
133 cmd->id = SCPI_CMD_SET_POWER_STATE; in scpi_set_sq_power_state()
134 cmd->set = SCPI_SET_NORMAL; in scpi_set_sq_power_state()
135 cmd->sender = 0; in scpi_set_sq_power_state()
136 cmd->size = sizeof(state); in scpi_set_sq_power_state()
151 scpi_cmd_t *cmd; in scpi_sys_power_state() local
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| /trusted-firmware-a-3.6.0-3.5.0/drivers/brcm/ |
| D | spi_flash.c | 43 static void spi_flash_addr(uint32_t addr, uint8_t *cmd) in spi_flash_addr() argument
49 cmd[1] = addr >> 16; in spi_flash_addr()
50 cmd[2] = addr >> 8; in spi_flash_addr()
51 cmd[3] = addr >> 0; in spi_flash_addr()
86 uint8_t cmd; in spi_flash_cmd_wait() local
93 cmd = CMD_RDSR; in spi_flash_cmd_wait()
94 ret = spi_flash_cmd_read(&cmd, 1, &status, 1); in spi_flash_cmd_wait()
114 static int spi_flash_write_common(struct spi_flash *flash, const uint8_t *cmd, in spi_flash_write_common() argument
126 ret = spi_flash_cmd_write(cmd, cmd_len, buf, buf_len); in spi_flash_write_common()
141 static int spi_flash_read_common(const uint8_t *cmd, size_t cmd_len, in spi_flash_read_common() argument
[all …]
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| D | spi_sf.c | 14 static int spi_flash_read_write(const uint8_t *cmd, in spi_flash_read_write() argument
26 ret = spi_xfer(cmd_len * BITS_PER_BYTE, cmd, NULL, flags); in spi_flash_read_write()
41 int spi_flash_cmd_read(const uint8_t *cmd, in spi_flash_cmd_read() argument
46 return spi_flash_read_write(cmd, cmd_len, NULL, data, data_len); in spi_flash_cmd_read()
49 int spi_flash_cmd(uint8_t cmd, void *response, size_t len) in spi_flash_cmd() argument
51 return spi_flash_cmd_read(&cmd, CMD_LEN1, response, len); in spi_flash_cmd()
54 int spi_flash_cmd_write(const uint8_t *cmd, in spi_flash_cmd_write() argument
59 return spi_flash_read_write(cmd, cmd_len, data, NULL, data_len); in spi_flash_cmd_write()
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| /trusted-firmware-a-3.6.0-3.5.0/plat/brcm/common/ |
| D | brcm_scpi.c | 55 static void scpi_secure_message_receive(scpi_cmd_t *cmd) in scpi_secure_message_receive() argument
59 assert(cmd != NULL); in scpi_secure_message_receive()
77 memcpy(cmd, (void *) SCPI_SHARED_MEM_SCP_TO_AP, sizeof(*cmd)); in scpi_secure_message_receive()
128 scpi_cmd_t *cmd; in scpi_set_brcm_power_state() local
151 cmd = SCPI_CMD_HEADER_AP_TO_SCP; in scpi_set_brcm_power_state()
152 cmd->id = SCPI_CMD_SET_POWER_STATE; in scpi_set_brcm_power_state()
153 cmd->set = SCPI_SET_NORMAL; in scpi_set_brcm_power_state()
154 cmd->sender = 0; in scpi_set_brcm_power_state()
155 cmd->size = sizeof(state); in scpi_set_brcm_power_state()
181 scpi_cmd_t *cmd; in scpi_get_brcm_power_state() local
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/plat/socionext/uniphier/ |
| D | uniphier_emmc.c | 98 struct uniphier_mmc_cmd *cmd) in uniphier_emmc_send_cmd() argument
106 mmio_write_32(host_base + SDHCI_ARGUMENT, cmd->cmdarg); in uniphier_emmc_send_cmd()
108 if (cmd->is_data) in uniphier_emmc_send_cmd()
115 if (!(cmd->resp_type & MMC_RSP_PRESENT)) in uniphier_emmc_send_cmd()
117 else if (cmd->resp_type & MMC_RSP_136) in uniphier_emmc_send_cmd()
119 else if (cmd->resp_type & MMC_RSP_BUSY) in uniphier_emmc_send_cmd()
124 if (cmd->resp_type & MMC_RSP_CRC) in uniphier_emmc_send_cmd()
126 if (cmd->resp_type & MMC_RSP_OPCODE) in uniphier_emmc_send_cmd()
128 if (cmd->is_data) in uniphier_emmc_send_cmd()
131 if (cmd->resp_type & MMC_RSP_BUSY || cmd->is_data) in uniphier_emmc_send_cmd()
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/drivers/arm/css/scpi/ |
| D | css_scpi.c | 54 static int scpi_secure_message_receive(scpi_cmd_t *cmd) in scpi_secure_message_receive() argument
58 assert(cmd != NULL); in scpi_secure_message_receive()
76 memcpy(cmd, (void *) SCPI_SHARED_MEM_SCP_TO_AP, sizeof(*cmd)); in scpi_secure_message_receive()
133 scpi_cmd_t *cmd; in scpi_set_css_power_state() local
156 cmd = SCPI_CMD_HEADER_AP_TO_SCP; in scpi_set_css_power_state()
157 cmd->id = SCPI_CMD_SET_CSS_POWER_STATE; in scpi_set_css_power_state()
158 cmd->set = SCPI_SET_NORMAL; in scpi_set_css_power_state()
159 cmd->sender = 0; in scpi_set_css_power_state()
160 cmd->size = sizeof(state); in scpi_set_css_power_state()
186 scpi_cmd_t *cmd; in scpi_get_css_power_state() local
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/drivers/st/mmc/ |
| D | stm32_sdmmc2.c | 135 static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd);
136 static int stm32_sdmmc2_send_cmd(struct mmc_cmd *cmd);
221 static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd) in stm32_sdmmc2_send_cmd_req() argument
230 if (cmd == NULL) { in stm32_sdmmc2_send_cmd_req()
235 arg_reg = cmd->cmd_arg; in stm32_sdmmc2_send_cmd_req()
241 cmd_reg = cmd->cmd_idx | SDMMC_CMDR_CPSMEN; in stm32_sdmmc2_send_cmd_req()
243 if (cmd->resp_type == 0U) { in stm32_sdmmc2_send_cmd_req()
247 if ((cmd->resp_type & MMC_RSP_48) != 0U) { in stm32_sdmmc2_send_cmd_req()
248 if ((cmd->resp_type & MMC_RSP_136) != 0U) { in stm32_sdmmc2_send_cmd_req()
251 } else if ((cmd->resp_type & MMC_RSP_CRC) != 0U) { in stm32_sdmmc2_send_cmd_req()
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/plat/brcm/board/stingray/src/ |
| D | scp_cmd.c | 29 resp->cmd = code & SCP_CMD_MASK; in scp_read_response()
40 int scp_send_cmd(uint32_t cmd, uint32_t param, uint32_t timeout) in scp_send_cmd() argument
44 mmio_write_32(CRMU_MAIL_BOX0, cmd); in scp_send_cmd()
52 (scp_resp.cmd == cmd)) { in scp_send_cmd()
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| /trusted-firmware-a-3.6.0-3.5.0/drivers/imx/usdhc/ |
| D | imx_usdhc.c | 21 static int imx_usdhc_send_cmd(struct mmc_cmd *cmd);
110 static int imx_usdhc_send_cmd(struct mmc_cmd *cmd) in imx_usdhc_send_cmd() argument
117 assert(cmd); in imx_usdhc_send_cmd()
133 switch (cmd->cmd_idx) { in imx_usdhc_send_cmd()
167 if (cmd->resp_type & MMC_RSP_48 && cmd->resp_type != MMC_RESPONSE_R2) in imx_usdhc_send_cmd()
169 else if (cmd->resp_type & MMC_RSP_136) in imx_usdhc_send_cmd()
171 else if (cmd->resp_type & MMC_RSP_BUSY) in imx_usdhc_send_cmd()
174 if (cmd->resp_type & MMC_RSP_CMD_IDX) in imx_usdhc_send_cmd()
177 if (cmd->resp_type & MMC_RSP_CRC) in imx_usdhc_send_cmd()
180 xfertype |= XFERTYPE_CMD(cmd->cmd_idx); in imx_usdhc_send_cmd()
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/drivers/marvell/ |
| D | mci.c | 319 int mci_read(int mci_idx, uint32_t cmd, uint32_t *value) in mci_read() argument
323 mci_mmio_write_32(MCI_ACCESS_CMD_REG(mci_idx), cmd); in mci_read()
332 int mci_write(int mci_idx, uint32_t cmd, uint32_t data) in mci_write() argument
335 mci_mmio_write_32(MCI_ACCESS_CMD_REG(mci_idx), cmd); in mci_write()
732 uint32_t cmd, data; in mci_get_link_status() local
734 cmd = (MCI_INDIRECT_REG_CTRL_ADDR(MCI_CTRL_STATUS_REG_NUM) | in mci_get_link_status()
736 if (mci_read(0, cmd, &data)) { in mci_get_link_status()
752 uint32_t cmd, data; in mci_turn_link_down() local
758 cmd = (MCI_INDIRECT_REG_CTRL_ADDR(MCI_CTRL_MCI_PHY_SETTINGS_REG_NUM) | in mci_turn_link_down()
762 rval = mci_write(0, cmd, data); in mci_turn_link_down()
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/drivers/rpi3/sdhost/ |
| D | rpi3_sdhost.c | 21 static int rpi3_sdhost_send_cmd(struct mmc_cmd *cmd);
70 static void send_command_raw(unsigned int cmd, unsigned int arg) in send_command_raw() argument
84 rpi3_sdhost_params.current_cmd = cmd & HC_CMD_COMMAND_MASK; in send_command_raw()
88 mmio_write_32(reg_base + HC_COMMAND, cmd | HC_CMD_ENABLE); in send_command_raw()
99 static void send_command_decorated(unsigned int cmd, unsigned int arg) in send_command_decorated() argument
103 switch (cmd & HC_CMD_COMMAND_MASK) { in send_command_decorated()
127 send_command_raw(cmd | cmd_flags, arg); in send_command_decorated()
257 static int rpi3_sdhost_send_cmd(struct mmc_cmd *cmd) in rpi3_sdhost_send_cmd() argument
273 cmd_idx = cmd->cmd_idx & HC_CMD_COMMAND_MASK; in rpi3_sdhost_send_cmd()
275 cmd_arg = cmd->cmd_arg; in rpi3_sdhost_send_cmd()
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/drivers/dp/ |
| D | mt_dp.c | 25 int32_t dp_secure_handler(uint64_t cmd, uint64_t para, uint32_t *val) in dp_secure_handler() argument
33 if ((cmd > DP_ATF_CMD_COUNT) || (val == NULL)) { in dp_secure_handler()
34 INFO("dp_secure_handler error cmd 0x%" PRIx64 "\n", cmd); in dp_secure_handler()
38 switch (cmd) { in dp_secure_handler()
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| /trusted-firmware-a-3.6.0-3.5.0/plat/brcm/board/stingray/include/ |
| D | scp_cmd.h | 13 int cmd; member
23 int scp_send_cmd(uint32_t cmd, uint32_t param, uint32_t timeout);
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| /trusted-firmware-a-3.6.0-3.5.0/drivers/renesas/common/emmc/ |
| D | emmc_utility.c | 126 void emmc_make_nontrans_cmd(HAL_MEMCARD_COMMAND cmd, uint32_t arg) in emmc_make_nontrans_cmd() argument
129 mmc_drv_obj.cmd_info.cmd = cmd; in emmc_make_nontrans_cmd()
133 cmd_reg_hw[cmd & HAL_MEMCARD_COMMAND_INDEX_MASK]; in emmc_make_nontrans_cmd()
144 switch (mmc_drv_obj.cmd_info.cmd & HAL_MEMCARD_RESPONSE_TYPE_MASK) { in emmc_make_nontrans_cmd()
175 void emmc_make_trans_cmd(HAL_MEMCARD_COMMAND cmd, uint32_t arg, in emmc_make_trans_cmd() argument
181 emmc_make_nontrans_cmd(cmd, arg); /* update common information */ in emmc_make_trans_cmd()
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| /trusted-firmware-a-3.6.0-3.5.0/plat/nvidia/tegra/drivers/bpmp_ipc/ |
| D | intf.h | 70 uint32_t cmd; member
125 #define make_mrq_clk_cmd(cmd, id) (((cmd) << 24) | (id & 0xFFFFFF)) argument
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| /trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/mt8183/drivers/mcdi/ |
| D | mtk_mcdi.c | 169 uint32_t cmd = mcdi_mbox_read(MCDI_MBOX_HP_CMD); in mcdi_hotplug_clr() local
172 if (!(cmd & tgt)) in mcdi_hotplug_clr()
179 cmd &= ~tgt; in mcdi_hotplug_clr()
180 mcdi_mbox_write(MCDI_MBOX_HP_CMD, cmd); in mcdi_hotplug_clr()
187 uint32_t cmd = mcdi_mbox_read(MCDI_MBOX_HP_CMD); in mcdi_hotplug_set() local
190 if ((cmd & tgt) == tgt) in mcdi_hotplug_set()
197 cmd |= tgt; in mcdi_hotplug_set()
198 mcdi_mbox_write(MCDI_MBOX_HP_CMD, cmd); in mcdi_hotplug_set()
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| /trusted-firmware-a-3.6.0-3.5.0/drivers/mtd/nand/ |
| D | spi_nand.c | 37 op.cmd.opcode = SPI_NAND_OP_GET_FEATURE; in spi_nand_reg()
39 op.cmd.opcode = SPI_NAND_OP_SET_FEATURE; in spi_nand_reg()
42 op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_reg()
134 op.cmd.opcode = SPI_NAND_OP_RESET; in spi_nand_reset()
135 op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_reset()
150 op.cmd.opcode = SPI_NAND_OP_READ_ID; in spi_nand_read_id()
151 op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_read_id()
170 op.cmd.opcode = SPI_NAND_OP_LOAD_PAGE; in spi_nand_load_page()
171 op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nand_load_page()
277 spinand_dev.spi_read_cache_op.cmd.opcode = SPI_NAND_OP_READ_FROM_CACHE; in spi_nand_init()
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| /trusted-firmware-a-3.6.0-3.5.0/drivers/ufs/ |
| D | ufs.c | 161 int ufshc_send_uic_cmd(uintptr_t base, uic_cmd_t *cmd) in ufshc_send_uic_cmd() argument
166 if (base == 0 || cmd == NULL) in ufshc_send_uic_cmd()
181 mmio_write_32(base + UCMDARG1, cmd->arg1); in ufshc_send_uic_cmd()
182 mmio_write_32(base + UCMDARG2, cmd->arg2); in ufshc_send_uic_cmd()
183 mmio_write_32(base + UCMDARG3, cmd->arg3); in ufshc_send_uic_cmd()
184 mmio_write_32(base + UICCMD, cmd->op); in ufshc_send_uic_cmd()
187 cmd->op == DME_SET); in ufshc_send_uic_cmd()
199 uic_cmd_t cmd; in ufshc_dme_get() local
207 cmd.arg1 = (attr << 16) | GEN_SELECTOR_IDX(idx); in ufshc_dme_get()
208 cmd.arg2 = 0; in ufshc_dme_get()
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| /trusted-firmware-a-3.6.0-3.5.0/drivers/synopsys/emmc/ |
| D | dw_mmc.c | 124 static int dw_send_cmd(struct mmc_cmd *cmd);
226 static int dw_send_cmd(struct mmc_cmd *cmd) in dw_send_cmd() argument
232 assert(cmd); in dw_send_cmd()
236 switch (cmd->cmd_idx) { in dw_send_cmd()
269 switch (cmd->resp_type) { in dw_send_cmd()
291 mmio_write_32(base + DWMMC_CMDARG, cmd->cmd_arg); in dw_send_cmd()
292 mmio_write_32(base + DWMMC_CMD, op | cmd->cmd_idx); in dw_send_cmd()
312 cmd->resp_data[0] = mmio_read_32(base + DWMMC_RESP0); in dw_send_cmd()
314 cmd->resp_data[1] = mmio_read_32(base + DWMMC_RESP1); in dw_send_cmd()
315 cmd->resp_data[2] = mmio_read_32(base + DWMMC_RESP2); in dw_send_cmd()
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/include/drivers/brcm/ |
| D | sf.h | 85 int spi_flash_cmd_read(const uint8_t *cmd, size_t cmd_len,
87 int spi_flash_cmd(uint8_t cmd, void *response, size_t len);
88 int spi_flash_cmd_write(const uint8_t *cmd, size_t cmd_len,
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| /trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/mt8195/drivers/spm/ |
| D | mt_spm_vcorefs.c | 359 static void spm_vcorefs_pwarp_cmd(uint64_t cmd, uint64_t val) in spm_vcorefs_pwarp_cmd() argument
361 if (cmd < NR_IDX_ALL) { in spm_vcorefs_pwarp_cmd()
362 mt_spm_pmic_wrap_set_cmd(PMIC_WRAP_PHASE_ALLINONE, cmd, val); in spm_vcorefs_pwarp_cmd()
408 uint64_t cmd = x1; in spm_vcorefs_args() local
411 switch (cmd) { in spm_vcorefs_args()
486 uint64_t cmd = x1; in spm_vcorefs_v2_args() local
489 switch (cmd) { in spm_vcorefs_v2_args()
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| /trusted-firmware-a-3.6.0-3.5.0/drivers/nxp/sd/ |
| D | sd_mmc.c | 183 static int esdhc_send_cmd(struct mmc *mmc, uint32_t cmd, uint32_t args) in esdhc_send_cmd() argument
206 cmd); in esdhc_send_cmd()
210 if (cmd == CMD2 || cmd == CMD9) { in esdhc_send_cmd()
212 } else if (cmd == CMD7 || (cmd == CMD6 && mmc->card.type == MMC_CARD)) { in esdhc_send_cmd()
214 } else if (cmd != CMD0) { in esdhc_send_cmd()
218 if (cmd == CMD2 || cmd == CMD9) { in esdhc_send_cmd()
220 } else if ((cmd != CMD0) && (cmd != ACMD41) && (cmd != CMD1)) { in esdhc_send_cmd()
224 if ((cmd == CMD8 || cmd == CMD14 || cmd == CMD19) && in esdhc_send_cmd()
227 if (cmd != CMD19) { in esdhc_send_cmd()
232 if (cmd == CMD6 || cmd == CMD17 || cmd == CMD18 || cmd == CMD24 || in esdhc_send_cmd()
[all …]
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| /trusted-firmware-a-3.6.0-3.5.0/plat/brcm/board/stingray/driver/ |
| D | swreg.c | 160 uint32_t cmd; in write_swreg_config() local
163 cmd = BSTI_CMD(0x1, BSTI_WRITE, reg_id, addr, BSTI_COMMAND_TA, data); in write_swreg_config()
165 mmio_write_32(BSTI_COMMAND_OFFSET, cmd); in write_swreg_config()
177 uint32_t cmd; in read_swreg_config() local
180 cmd = BSTI_CMD(0x1, BSTI_READ, reg_id, addr, BSTI_COMMAND_TA, PHY_REG0); in read_swreg_config()
182 mmio_write_32(BSTI_COMMAND_OFFSET, cmd); in read_swreg_config()
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| /trusted-firmware-a-3.6.0-3.5.0/plat/nvidia/tegra/soc/t194/drivers/mce/ |
| D | mce.c | 43 int32_t mce_command_handler(uint64_t cmd, uint64_t arg0, uint64_t arg1, in mce_command_handler() argument
48 switch (cmd) { in mce_command_handler()
74 ERROR("unknown MCE command (%" PRIu64 ")\n", cmd); in mce_command_handler()
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| /trusted-firmware-a-3.6.0-3.5.0/plat/st/stm32mp1/ |
| D | stm32mp1_boot_device.c | 179 device->spi_read_cache_op.cmd.opcode = SPI_NAND_OP_READ_FROM_CACHE_4X; in plat_get_spi_nand_data()
180 device->spi_read_cache_op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in plat_get_spi_nand_data()
198 device->read_op.cmd.opcode = SPI_NOR_OP_READ_1_1_4; in plat_get_nor_data()
199 device->read_op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in plat_get_nor_data()
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