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Searched refs:GICC_HPPIR (Results 1 – 16 of 16) sorted by relevance

/trusted-firmware-a-3.6.0-3.5.0/drivers/arm/gic/v2/
Dgicv2_private.h87 return mmio_read_32(base + GICC_HPPIR); in gicc_read_hppir()
142 mmio_write_32(base + GICC_HPPIR, val); in gicc_write_hppir()
/trusted-firmware-a-3.6.0-3.5.0/plat/nvidia/tegra/include/
Dplat_macros.S37 ldr w8, [x16, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/amlogic/common/include/
Dplat_macros.S39 ldr w8, [x17, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/mt8183/include/
Dplat_macros.S40 ldr w8, [x27, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/mt8173/include/
Dplat_macros.S40 ldr w8, [x17, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/hisilicon/hikey/include/
Dplat_macros.S42 ldr w8, [x17, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/hisilicon/hikey960/include/
Dplat_macros.S42 ldr w8, [x17, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/renesas/common/include/
Dplat_macros.S37 ldr w8, [x17, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/xilinx/versal_net/include/
Dplat_macros.S69 ldr w8, [x17, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/xilinx/versal/include/
Dplat_macros.S68 ldr w8, [x17, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/qti/common/inc/aarch64/
Dplat_macros.S76 ldr w8, [x27, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/include/plat/arm/common/aarch64/
Darm_macros.S67 ldr w8, [x17, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/rockchip/common/include/
Dplat_macros.S75 ldr w8, [x27, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/include/plat/marvell/armada/common/aarch64/
Dmarvell_macros.S76 ldr w8, [x17, #GICC_HPPIR]
/trusted-firmware-a-3.6.0-3.5.0/include/drivers/arm/
Dgicv2.h75 #define GICC_HPPIR U(0x18) macro
/trusted-firmware-a-3.6.0-3.5.0/docs/
Dporting-guide.rst3146 Pending Interrupt Register* (``GICC_HPPIR``) is read to determine the id of
3177 Pending Interrupt Register* (``GICC_HPPIR``) is read to determine the id of the