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Searched refs:GICC_AHPPIR (Results 1 – 16 of 16) sorted by relevance

/trusted-firmware-a-3.6.0-3.5.0/plat/nvidia/tegra/include/
Dplat_macros.S38 ldr w9, [x16, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/amlogic/common/include/
Dplat_macros.S40 ldr w9, [x17, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/mt8183/include/
Dplat_macros.S41 ldr w9, [x27, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/mediatek/mt8173/include/
Dplat_macros.S41 ldr w9, [x17, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/hisilicon/hikey/include/
Dplat_macros.S43 ldr w9, [x17, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/hisilicon/hikey960/include/
Dplat_macros.S43 ldr w9, [x17, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/renesas/common/include/
Dplat_macros.S38 ldr w9, [x17, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/xilinx/versal_net/include/
Dplat_macros.S70 ldr w9, [x17, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/xilinx/versal/include/
Dplat_macros.S69 ldr w9, [x17, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/qti/common/inc/aarch64/
Dplat_macros.S77 ldr w9, [x27, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/include/plat/arm/common/aarch64/
Darm_macros.S68 ldr w9, [x17, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/plat/rockchip/common/include/
Dplat_macros.S76 ldr w9, [x27, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/include/plat/marvell/armada/common/aarch64/
Dmarvell_macros.S77 ldr w9, [x17, #GICC_AHPPIR]
/trusted-firmware-a-3.6.0-3.5.0/drivers/arm/gic/v2/
Dgicv2_private.h92 return mmio_read_32(base + GICC_AHPPIR); in gicc_read_ahppir()
/trusted-firmware-a-3.6.0-3.5.0/include/drivers/arm/
Dgicv2.h76 #define GICC_AHPPIR U(0x28) macro
/trusted-firmware-a-3.6.0-3.5.0/docs/
Dporting-guide.rst3183 (``GICC_AHPPIR``) is read to determine the id of the non-secure interrupt.