Searched refs:DDRC_RFSHCTL3 (Results 1 – 4 of 4) sorted by relevance
113 val = mmio_read_32(DDRC_RFSHCTL3(0)); in sw_pstate()115 mmio_write_32(DDRC_RFSHCTL3(0), val & 0xFFFFFFFD); in sw_pstate()117 mmio_write_32(DDRC_RFSHCTL3(0), val | 0x2); in sw_pstate()
179 val = mmio_read_32(DDRC_RFSHCTL3(0)); in lpddr4_swffc()181 mmio_write_32(DDRC_RFSHCTL3(0), val); in lpddr4_swffc()
227 mmio_write_32(DDRC_RFSHCTL3(0), 0x0); in dram_exit_retention()
33 #define DDRC_RFSHCTL3(X) (DDRC_IPS_BASE_ADDR(X) + 0x60) macro