CLK_SET_RATE_GATE (reference) in projects: trusted-firmware-a-3.6.0-3.5.0

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Searched refs:CLK_SET_RATE_GATE (Results 1 – 2 of 2) sorted by relevance

/trusted-firmware-a-3.6.0-3.5.0/plat/xilinx/zynqmp/pm_service/
D	pm_api_clock.h	`32 #define CLK_SET_RATE_GATE BIT(0) /* must be gated across rate change */ macro`
D	pm_api_clock.c	`180 CLK_SET_RATE_GATE \| \ 418 CLK_SET_RATE_GATE \| 435 CLK_SET_RATE_GATE,`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
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babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
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babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
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