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/trusted-firmware-a-3.4.0/include/plat/marvell/armada/common/aarch64/
Dmarvell_macros.S50 mrs x7, id_aa64pfr0_el1
51 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
52 cmp x7, #1
84 add x7, x16, #GICD_ISPENDR
88 sub x4, x7, x16
96 ldr x4, [x7], #8
121 mov_imm x7, (PLAT_MARVELL_CCI_BASE + SLAVE_IFACE_OFFSET( \
123 ldr w8, [x7, #SNOOP_CTRL_REG]
125 mov_imm x7, (PLAT_MARVELL_CCI_BASE + SLAVE_IFACE_OFFSET( \
127 ldr w9, [x7, #SNOOP_CTRL_REG]
Dcci_macros.S28 mov_imm x7, (PLAT_MARVELL_CCI_BASE + SLAVE_IFACE_OFFSET( \
30 ldr w8, [x7, #SNOOP_CTRL_REG]
32 mov_imm x7, (PLAT_MARVELL_CCI_BASE + SLAVE_IFACE_OFFSET( \
34 ldr w9, [x7, #SNOOP_CTRL_REG]
/trusted-firmware-a-3.4.0/plat/rockchip/common/include/
Dplat_macros.S51 mrs x7, id_aa64pfr0_el1
52 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
53 cmp x7, #1
83 add x7, x26, #GICD_ISPENDR
87 sub x4, x7, x26
95 ldr x4, [x7], #8
106 mov_imm x7, (PLAT_RK_CCI_BASE + SLAVE_IFACE_OFFSET( \
108 ldr w8, [x7, #SNOOP_CTRL_REG]
110 mov_imm x7, (PLAT_RK_CCI_BASE + SLAVE_IFACE_OFFSET( \
112 ldr w9, [x7, #SNOOP_CTRL_REG]
/trusted-firmware-a-3.4.0/include/plat/arm/common/aarch64/
Darm_macros.S43 mrs x7, id_aa64pfr0_el1
44 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
45 cmp x7, #1
75 add x7, x16, #GICD_ISPENDR
79 sub x4, x7, x16
88 sub x4, x7, x16
95 ldr x4, [x7], #8
Dcci_macros.S26 mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \
28 ldr w8, [x7, #SNOOP_CTRL_REG]
30 mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \
32 ldr w9, [x7, #SNOOP_CTRL_REG]
/trusted-firmware-a-3.4.0/plat/mediatek/mt8183/include/
Dplat_macros.S47 add x7, x26, #GICD_ISPENDR
51 sub x4, x7, x26
59 ldr x4, [x7], #8
69 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
71 ldr w8, [x7, #SNOOP_CTRL_REG]
73 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
75 ldr w9, [x7, #SNOOP_CTRL_REG]
/trusted-firmware-a-3.4.0/plat/mediatek/mt8173/include/
Dplat_macros.S47 add x7, x16, #GICD_ISPENDR
51 sub x4, x7, x16
59 ldr x4, [x7], #8
69 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
71 ldr w8, [x7, #SNOOP_CTRL_REG]
73 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
75 ldr w9, [x7, #SNOOP_CTRL_REG]
/trusted-firmware-a-3.4.0/plat/hisilicon/hikey/include/
Dplat_macros.S49 add x7, x16, #GICD_ISPENDR
53 sub x4, x7, x16
59 ldr x4, [x7], #8
67 mov_imm x7, (CCI400_BASE + SLAVE_IFACE_OFFSET( \
69 ldr w8, [x7, #SNOOP_CTRL_REG]
71 mov_imm x7, (CCI400_BASE + SLAVE_IFACE_OFFSET( \
73 ldr w9, [x7, #SNOOP_CTRL_REG]
/trusted-firmware-a-3.4.0/plat/hisilicon/hikey960/include/
Dplat_macros.S49 add x7, x16, #GICD_ISPENDR
53 sub x4, x7, x16
59 ldr x4, [x7], #8
67 mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
69 ldr w8, [x7, #SNOOP_CTRL_REG]
71 mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
73 ldr w9, [x7, #SNOOP_CTRL_REG]
/trusted-firmware-a-3.4.0/plat/renesas/common/include/
Dplat_macros.S44 add x7, x16, #GICD_ISPENDR
48 sub x4, x7, x16
54 ldr x4, [x7], #8
76 mov_imm x7, (CCI500_BASE + SLAVE_IFACE3_OFFSET)
77 ldr w8, [x7, #SNOOP_CTRL_REG]
79 mov_imm x7, (CCI500_BASE + SLAVE_IFACE4_OFFSET)
80 ldr w9, [x7, #SNOOP_CTRL_REG]
/trusted-firmware-a-3.4.0/plat/xilinx/versal/include/
Dplat_macros.S43 mrs x7, id_aa64pfr0_el1
44 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
45 cmp x7, #1
75 add x7, x16, #GICD_ISPENDR
79 sub x4, x7, x16
87 ldr x4, [x7], #8
/trusted-firmware-a-3.4.0/plat/qti/common/inc/aarch64/
Dplat_macros.S52 mrs x7, id_aa64pfr0_el1
53 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
54 cmp x7, #1
84 add x7, x26, #GICD_ISPENDR
88 sub x4, x7, x26
96 ldr x4, [x7], #8
/trusted-firmware-a-3.4.0/plat/nxp/soc-ls1043a/aarch64/
Dls1043a.S294 mov x7, x0
299 and x6, x6, x7
335 and x6, x6, x7
420 ldr x7, =IPSTPACK_RETRY_CNT
426 sub x7, x7, #1
427 cbnz x7, 3b
432 ldr x7, =IPSTPACK_RETRY_CNT
440 sub x7, x7, #1
441 cbnz x7, 4b
447 ldr x7, =IPSTPACK_RETRY_CNT
[all …]
/trusted-firmware-a-3.4.0/lib/libc/aarch64/
Dsetjmp.S18 mov x7, sp
26 stp x7, xzr, [x0, #JMP_CTX_SP]
37 ldp x7, xzr, [x0, #JMP_CTX_SP]
45 cmp x7, x19
56 mov sp, x7
/trusted-firmware-a-3.4.0/drivers/renesas/common/console/
Drcar_console.S36 mov x7, x30
45 mov x30, x7
49 ret x7
/trusted-firmware-a-3.4.0/plat/nxp/soc-ls1088a/aarch64/
Dls1088a.S112 stp x6, x7, [sp, #-16]!
134 ldp x6, x7, [sp], #16
335 mov x7, x0
351 mov x0, x7
356 mov x0, x7
908 stp x6, x7, [sp, #-16]!
944 stp x6, x7, [sp, #-16]!
1015 and x6, x6, x7
1081 ldr x7, =IPSTPACK_RETRY_CNT
1086 sub x7, x7, #1
[all …]
/trusted-firmware-a-3.4.0/plat/nxp/common/ocram/aarch64/
Docram.S29 stp x6, x7, [sp, #-16]!
42 ldp x6, x7, [x0, #16]
46 stp x6, x7, [x0, #16]
68 ldp x6, x7, [sp], #16
/trusted-firmware-a-3.4.0/plat/amlogic/common/include/
Dplat_macros.S48 add x7, x16, #GICD_ISPENDR
53 sub x4, x7, x16
61 ldr x4, [x7], #8
/trusted-firmware-a-3.4.0/plat/nvidia/tegra/include/
Dplat_macros.S45 add x7, x16, #GICD_ISPENDR
49 sub x4, x7, x16
55 ldr w4, [x7], #4
/trusted-firmware-a-3.4.0/plat/imx/common/
Dlpuart_console.S20 mov x7, x30
29 mov x30, x7
33 ret x7
Dimx_uart_console.S25 mov x7, x30
34 mov x30, x7
38 ret x7
/trusted-firmware-a-3.4.0/lib/xlat_mpu/aarch64/
Denable_mpu.S21 mov x7, x0
46 tst x7, #DISABLE_DCACHE
/trusted-firmware-a-3.4.0/plat/nxp/common/psci/aarch64/
Dpsci_utils.S37 stp x6, x7, [sp, #-16]!
122 ldr x7, =SOC_CORE_RELEASE
123 cbnz x7, 3f
146 ldr x7, =SOC_CORE_RESTART
147 cbnz x7, 2f
192 ldp x6, x7, [sp], #16
219 stp x6, x7, [sp, #-16]!
273 ldp x6, x7, [sp], #16
318 stp x6, x7, [sp, #-16]!
358 ldp x6, x7, [sp], #16
[all …]
/trusted-firmware-a-3.4.0/drivers/cadence/uart/aarch64/
Dcdns_console.S72 mov x7, x30
81 mov x30, x7
85 ret x7
/trusted-firmware-a-3.4.0/bl31/aarch64/
Dcrash_reporting.S80 mrs x7, tpidr_el3
86 cmp x7, x5
99 ldr x4, [x7], #REGSZ
222 add x7, sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0
236 ldr x4, [x7], #REGSZ
250 ldr x4, [x7]
365 str x7, [x0, #REGSZ * 7]

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