| /trusted-firmware-a-3.4.0/drivers/rpi3/gpio/ |
| D | rpi3_gpio.c | 47 int shift = 3 * (gpio % 10); in rpi3_gpio_get_select() local
51 ret = (sel >> shift) & 0x07; in rpi3_gpio_get_select()
72 int shift = 3 * (gpio % 10); in rpi3_gpio_set_select() local
75 uint32_t mask = U(0x07) << shift; in rpi3_gpio_set_select()
77 sel = (sel & (~mask)) | ((fsel << shift) & mask); in rpi3_gpio_set_select()
108 int shift = gpio % 32; in rpi3_gpio_get_value() local
112 if ((value >> shift) & 0x01) in rpi3_gpio_get_value()
120 int shift = gpio % 32; in rpi3_gpio_set_value() local
126 mmio_write_32(reg_clr, U(1) << shift); in rpi3_gpio_set_value()
129 mmio_write_32(reg_set, U(1) << shift); in rpi3_gpio_set_value()
[all …]
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| /trusted-firmware-a-3.4.0/plat/xilinx/zynqmp/pm_service/ |
| D | pm_api_ioctl.c | 184 uint32_t val, mask, shift; in pm_ioctl_set_sgmii_mode() local
193 shift = 0; in pm_ioctl_set_sgmii_mode()
196 shift = 1; in pm_ioctl_set_sgmii_mode()
199 shift = 2; in pm_ioctl_set_sgmii_mode()
202 shift = 3; in pm_ioctl_set_sgmii_mode()
209 mask = GEM_SGMII_MASK << GEM_CLK_CTRL_OFFSET * shift; in pm_ioctl_set_sgmii_mode()
213 mask = SGMII_SD_MASK << SGMII_SD_OFFSET * shift; in pm_ioctl_set_sgmii_mode()
214 val = SGMII_PCS_SD_1 << SGMII_SD_OFFSET * shift; in pm_ioctl_set_sgmii_mode()
221 mask = GEM_CLK_CTRL_MASK << GEM_CLK_CTRL_OFFSET * shift; in pm_ioctl_set_sgmii_mode()
223 val <<= GEM_CLK_CTRL_OFFSET * shift; in pm_ioctl_set_sgmii_mode()
[all …]
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| /trusted-firmware-a-3.4.0/plat/rockchip/rk3288/drivers/soc/ |
| D | soc.h | 96 #define regs_update_bit_set(addr, shift) \ argument
97 regs_update_bits((addr), 0x1, 0x1, (shift))
98 #define regs_update_bit_clr(addr, shift) \ argument
99 regs_update_bits((addr), 0x0, 0x1, (shift))
102 uint32_t mask, uint32_t shift);
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| D | soc.c | 91 uint32_t mask, uint32_t shift) in regs_update_bits() argument
97 tmp = orig & ~(mask << shift); in regs_update_bits()
98 tmp |= (val & mask) << shift; in regs_update_bits()
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| /trusted-firmware-a-3.4.0/drivers/st/etzpc/ |
| D | etzpc.c | 97 uint32_t shift = (decprot_id % IDS_PER_DECPROT_REGS) << DECPROT_SHIFT; in etzpc_configure_decprot() local
103 (uint32_t)ETZPC_DECPROT0_MASK << shift, in etzpc_configure_decprot()
104 masked_decprot << shift); in etzpc_configure_decprot()
115 uint32_t shift = (decprot_id % IDS_PER_DECPROT_REGS) << DECPROT_SHIFT; in etzpc_get_decprot() local
121 value = (mmio_read_32(base_decprot + ETZPC_DECPROT0) >> shift) & in etzpc_get_decprot()
134 uint32_t shift = BIT(decprot_id % IDS_PER_DECPROT_LOCK_REGS); in etzpc_lock_decprot() local
139 mmio_write_32(base_decprot + ETZPC_DECPROT_LOCK0, shift); in etzpc_lock_decprot()
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| /trusted-firmware-a-3.4.0/plat/rockchip/rk3368/drivers/soc/ |
| D | soc.h | 131 #define regs_updata_bit_set(addr, shift) \ argument
132 regs_updata_bits((addr), 0x1, 0x1, (shift))
133 #define regs_updata_bit_clr(addr, shift) \ argument
134 regs_updata_bits((addr), 0x0, 0x1, (shift))
137 uint32_t mask, uint32_t shift);
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| D | soc.c | 111 uint32_t mask, uint32_t shift) in regs_updata_bits() argument
117 tmp = orig & ~(mask << shift); in regs_updata_bits()
118 tmp |= (val & mask) << shift; in regs_updata_bits()
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| /trusted-firmware-a-3.4.0/plat/rockchip/common/include/ |
| D | plat_private.h | 52 #define BITS_SHIFT(bits, shift) (bits << (shift)) argument
56 #define BITS_WITH_WMASK(bits, msk, shift)\ argument
57 (BITS_SHIFT(bits, shift) | BITS_SHIFT(msk, (shift + REG_MSK_SHIFT)))
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| /trusted-firmware-a-3.4.0/drivers/renesas/common/ddr/ |
| D | dram_sub_func.c | 41 uint32_t shift; in rcar_dram_get_boot_status() local
46 shift = GPIO_BKUP_TRG_SHIFT_CONDOR; in rcar_dram_get_boot_status()
49 shift = GPIO_BKUP_TRG_SHIFT_EBISU; in rcar_dram_get_boot_status()
52 shift = GPIO_BKUP_TRG_SHIFT_SALVATOR; in rcar_dram_get_boot_status()
57 if (reg_data & BIT(shift)) in rcar_dram_get_boot_status()
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| /trusted-firmware-a-3.4.0/plat/socionext/uniphier/ |
| D | uniphier_soc_info.c | 16 unsigned int shift) in uniphier_get_revision_field() argument
25 return (mmio_read_32(reg) >> shift) & mask; in uniphier_get_revision_field()
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| /trusted-firmware-a-3.4.0/plat/mediatek/mt8173/drivers/spm/ |
| D | spm_mcdi.c | 410 unsigned int pwr_status, shift, i, flag = 0; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off() local
419 shift = i + PCM_MCDI_CA72_PWRSTA_SHIFT; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
420 flag |= (pwr_status & (1 << shift)) >> shift; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
429 shift = i + PCM_MCDI_CA53_PWRSTA_SHIFT; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
430 flag |= (pwr_status & (1 << shift)) >> shift; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
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| /trusted-firmware-a-3.4.0/plat/mediatek/common/drivers/rtc/ |
| D | rtc_mt6359p.c | 13 uint16_t mask, uint16_t shift) in RTC_Config_Interface() argument
19 pmic_reg &= ~(mask << shift); in RTC_Config_Interface()
20 pmic_reg |= (data << shift); in RTC_Config_Interface()
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| /trusted-firmware-a-3.4.0/drivers/brcm/ |
| D | iproc_gpio.c | 58 unsigned int shift = IPROC_GPIO_SHIFT(gpio); in gpio_set_bit() local
63 val |= BIT(shift); in gpio_set_bit()
65 val &= ~BIT(shift); in gpio_set_bit()
73 unsigned int shift = IPROC_GPIO_SHIFT(gpio); in gpio_get_bit() local
75 return !!(mmio_read_32(base + offset) & BIT(shift)); in gpio_get_bit()
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| /trusted-firmware-a-3.4.0/plat/rockchip/px30/drivers/soc/ |
| D | soc.h | 13 #define BITS_WMSK(msk, shift) ((msk) << (shift + REG_MSK_SHIFT)) argument
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| /trusted-firmware-a-3.4.0/plat/rockchip/rk3328/drivers/soc/ |
| D | soc.h | 21 #define BITS_WMSK(msk, shift) ((msk) << (shift + REG_MSK_SHIFT)) argument
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| /trusted-firmware-a-3.4.0/drivers/nxp/ddr/nxp-ddr/ |
| D | ddrc.c | 63 uint32_t map, shift, highest; in bist() local
83 shift = (3U - i % 4U) * 8U + 2U; in bist()
84 map = (temp32 >> shift) & U(0x3F); in bist()
93 shift = (3U - pos % 4U) * 8U + 2U; in bist()
95 pos >> 2U, shift, map_save); in bist()
96 temp32 = map_save & ~(U(0x3F) << shift); in bist()
97 temp32 |= 8U << shift; in bist()
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| /trusted-firmware-a-3.4.0/drivers/st/gpio/ |
| D | stm32_gpio.c | 257 size_t shift = (pin - GPIO_ALT_LOWER_LIMIT) << 2; in set_gpio() local
260 (uint32_t)GPIO_ALTERNATE_MASK << shift, in set_gpio()
261 alternate << shift); in set_gpio()
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| /trusted-firmware-a-3.4.0/lib/aarch32/ |
| D | cache_helpers.S | 84 .macro dcsw_op shift, fw, ls
86 ubfx r3, r2, \shift, \fw
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| /trusted-firmware-a-3.4.0/plat/marvell/armada/a8k/common/ |
| D | plat_pm.c | 504 unsigned int shift; in plat_marvell_power_off_gpio() local
549 shift = pm_cfg->cfg.gpio.info[gpio].gpio_index % 32; in plat_marvell_power_off_gpio()
551 reg &= ~(1 << shift); in plat_marvell_power_off_gpio()
553 reg |= (1 << shift); in plat_marvell_power_off_gpio()
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| /trusted-firmware-a-3.4.0/lib/aarch64/ |
| D | cache_helpers.S | 112 .macro dcsw_op shift, fw, ls
114 ubfx x3, x9, \shift, \fw
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| /trusted-firmware-a-3.4.0/drivers/st/clk/ |
| D | clk-stm32-core.c | 295 mask = MASK_WIDTH_SHIFT(mux->width, mux->shift); in clk_mux_set_parent()
297 mmio_clrsetbits_32(address, mask, (sel << mux->shift) & mask); in clk_mux_set_parent()
378 mask = MASK_WIDTH_SHIFT(mux->width, mux->shift); in clk_mux_get_parent()
380 return (mmio_read_32(priv->base + mux->offset) & mask) >> mux->shift; in clk_mux_get_parent()
750 val = mmio_read_32(priv->base + divider->offset) >> divider->shift; in clk_stm32_div_get_value()
799 mask = MASK_WIDTH_SHIFT(divider->width, divider->shift); in clk_stm32_set_div()
800 mmio_clrsetbits_32(address, mask, (value << divider->shift) & mask); in clk_stm32_set_div()
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| D | clk-stm32-core.h | 12 uint8_t shift; member
30 uint8_t shift; member
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| /trusted-firmware-a-3.4.0/include/arch/aarch64/ |
| D | arch_helpers.h | 599 unsigned int shift = ID_AA64PFR0_EL1_SHIFT * el; in el_implemented() local
601 return (read_id_aa64pfr0_el1() >> shift) & ID_AA64PFR0_ELX_MASK; in el_implemented()
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| /trusted-firmware-a-3.4.0/drivers/nxp/ddr/phy-gen2/ |
| D | phy.c | 2290 int shift = read ? 4 : 0; in parse_odt() local
2298 odt[i] |= (1 << i) << shift; in parse_odt()
2308 odt[j] |= (1 << i) << shift; in parse_odt()
2320 odt[j] |= (1 << i) << shift; in parse_odt()
2329 odt[j] |= (1 << i) << shift; in parse_odt()
2338 odt[j] |= (1 << i) << shift; in parse_odt()
2351 odt[j] |= (1 << i) << shift; in parse_odt()
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| /trusted-firmware-a-3.4.0/docs/components/ |
| D | romlib-design.rst | 122 This will have for effect to shift down all the BL images by 1 page.
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