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Searched refs:routing (Results 1 – 9 of 9) sorted by relevance

/trusted-firmware-a-3.4.0/docs/design/
Dinterrupt-framework-design.rst5 allows EL3 software to configure the interrupt routing behavior. Its main
69 A routing model for a type of interrupt (generated as FIQ or IRQ) is defined as
73 routed to EL3. A routing model is applicable only when execution is not in EL3.
75 The default routing model for an interrupt type is to route it to the FEL in
78 Valid routing models
81 The framework considers certain routing models for each type of interrupt to be
83 following sub-sections describe all the possible routing models and specify
99 secure state. This is a valid routing model as secure software is in
103 state. This is a valid routing model as secure software in EL3 can
107 non-secure state. This is an invalid routing model as a secure interrupt
[all …]
/trusted-firmware-a-3.4.0/services/std_svc/sdei/
Dsdei_main.c282 unsigned int routing; in sdei_event_routing_set() local
314 routing = (unsigned int) ((flags == SDEI_REGF_RM_ANY) ? in sdei_event_routing_set()
328 plat_ic_set_spi_routing(map->intr, routing, (u_register_t) mpidr); in sdei_event_routing_set()
344 unsigned int routing; in sdei_event_register() local
444 routing = (unsigned int) ((flags == SDEI_REGF_RM_ANY) ? in sdei_event_register()
446 plat_ic_set_spi_routing(map->intr, routing, in sdei_event_register()
/trusted-firmware-a-3.4.0/docs/components/
Dplatform-interrupt-controller-API.rst224 This API should set the routing mode of Share Peripheral Interrupt (SPI)
238 the routing.
Dras.rst23 As mentioned above, the RAS support in |TF-A| enables routing to and handling of
201 - ``HANDLE_EA_EL3_FIRST=1`` enables routing of External Aborts and SErrors to
Dexception-handling.rst26 interrupt routing model, TF-A appropriately sets the ``FIQ`` and ``IRQ`` bits of
27 ``SCR_EL3`` register to effect this routing. For most use cases, other than for
150 interrupts at S-EL1. Essentially, this deprecates the routing mode described
537 interrupts. This also results in setting the routing bits in ``SCR_EL3``.
/trusted-firmware-a-3.4.0/docs/about/
Dfeatures.rst41 and interrupt routing.
/trusted-firmware-a-3.4.0/docs/getting_started/
Dbuild-options.rst859 routing model which routes non-secure interrupts asynchronously from TSP
861 for saving and restoring the TSP context in this routing model. The
862 default routing model (when the value is 0) is to route non-secure
Dpsci-lib-integration-guide.rst42 additional configuration to be set for non-secure context, like routing
/trusted-firmware-a-3.4.0/docs/
Dchange-log.md3254 - arm/n1sdp: Setup multichip gic routing table, update platform macros for
5198 - Enabled wake-up from CPU_SUSPEND to stand-by by temporarily re-routing
5367 - Support has been added to demonstrate routing of IRQs to EL3 instead of S-EL1
5705 (using GICv2 routing only). Demonstrated this working by adding an interrupt